In this paper, we present a Natural Modeling Framework for Processor Design Automation System, Trilobite. Unlike other systems solicite explicit pipeline and instruction definitions to direct them, Trilobite gives the designer the freedom to model the processor in the high-level Behavior Accurate Processor Description (BAPD), which is based on the basic building block Mem and PDSDL (Python based Dynamic System Description Language [1]). Given the BAPD, software development and hardware synthesis can be performed simultaneously with four verification stages varying in accuracy and speed. Various translators and optimizers are introduced to convert BAPD to PDSDL, finally to Hardware Description Language (HDL). This powerful toolset could build diverse circuits ranging from simple combinational and sequential circuit to advanced pipelined superscalar. Compared to the determinate modeling inside traditional ADL, Trilobite is powerful and flexible. The preliminary result of our Java Processor System based on Trilobite is given at the end. It proves to be effective and productive1.
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