A Generic Traffic Model for On-Chip Interconnection Networks
暂无分享,去创建一个
[1] Frederica Darema,et al. Memory access patterns of parallel scientific programs , 1987, SIGMETRICS '87.
[2] Donald A. Calahan,et al. Models of Access Delays in Multiprocessor Memories , 1992, IEEE Trans. Parallel Distributed Syst..
[3] Walter Willinger,et al. On the self-similar nature of Ethernet traffic , 1993, SIGCOMM '93.
[4] Stephen W. Turner,et al. Performance analysis of multiprocessor interconnection networks using a burst-traffic model , 1995 .
[5] Sally Floyd,et al. Wide area traffic: the failure of Poisson modeling , 1995, TNET.
[6] Kevin P. Lawton. Bochs: A Portable PC Emulator for Unix/X , 1996 .
[7] Walter Willinger,et al. Proof of a fundamental result in self-similar traffic modeling , 1997, CCRV.
[8] Walter Willinger,et al. Self-similarity through high-variability: statistical analysis of Ethernet LAN traffic at the source level , 1997, TNET.
[9] N.D. Georganas,et al. Self-Similar Processes in Communications Networks , 1998, IEEE Trans. Inf. Theory.
[10] Walter Willinger,et al. Self-Similar Network Traffic and Performance Evaluation , 2000 .
[11] Sujit Dey,et al. Evaluation of the traffic-performance characteristics of system-on-chip communication architectures , 2001, VLSI Design 2001. Fourteenth International Conference on VLSI Design.
[12] W. Dally,et al. Route packets, not wires: on-chip interconnection networks , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[13] Murad S. Taqqu,et al. Theory and applications of long-range dependence , 2003 .
[14] Radu Marculescu,et al. DyAD - smart routing for networks-on-chip , 2004, Proceedings. 41st Design Automation Conference, 2004..
[15] William J. Dally,et al. Principles and Practices of Interconnection Networks , 2004 .
[16] Radu Marculescu,et al. On-chip traffic modeling and synthesis for MPEG-2 video applications , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[17] Li-Shiuan Peh,et al. A Statistical Traffic Model for On-Chip Interconnection Networks , 2006, 14th IEEE International Symposium on Modeling, Analysis, and Simulation.
[18] Fernando Gehm Moraes,et al. Application driven traffic modeling for NoCs , 2006, SBCCI '06.
[19] Vincenzo Catania,et al. A methodology for design of application specific deadlock-free routing algorithms for NoC systems , 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).
[20] Niraj K. Jha,et al. Express virtual channels: towards the ideal interconnection fabric , 2007, ISCA '07.
[21] Seung Eun Lee,et al. Design of a router for network-on-chip , 2007, Int. J. High Perform. Syst. Archit..
[22] Seung Eun Lee,et al. On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture , 2007, Fourth International Conference on Information Technology (ITNG'07).
[23] G. CN5MOP946Q,et al. Characterizing user behavior and network performance in a public wireless lan , .