FPGA vendor-agnostic IP-XACT- and XSLT-based RTL design generator

The growing complexity of current embedded systems increases not only the time-to-prototype and time-to-market, but it also requires a major effort around repetitive engineering tasks in order to maximize the efficiency and minimize the money investment. A lot of research has been done on this field, leading system development, test automation and system reutilization to huge relevance and considerable importance in industry and academia. Using eXtensible Markup Language (XML) files to store Intellectual Property (IP) metadata, the IP-XACT standard arises as a possible solution for IP reutilization and vendor independence. This paper describes a RTL design generator that uses IP-XACT components description and apply XSLT transformations for complete system generation, following a generative programming (GP) approach while automating the design flow through the integration and interoperability of external tools needed to design, implement and finally deploy the final system under the chosen FPGA board. The aim is to provide a unified and easy to use interface for code generation and deployment independent from FPGA vendors, i.e., fostering vendor-agnosticism.