Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers

Memory controllers are stated as the backbone ofdiverse architectures in the ASIC world. Among many concerns inenhancing the performance of the memory controllers is thetremendous verification process that consumes time, effort andresources. This paper proposes an optimized generic universalverification methodology (UVM) architecture to verify the flashmemory controllers. The architecture built is based on a surveyabout the main flash memory controllers architecture typesincluding Flex-One NAND, Open NAND Flash Interface (ONFI), Embedded Multi-Media Card (e.MMC), Universal Flash Storage(UFS) and the SD-CARD memory controller examined with–opensource wishbone(WB) interface. Introducing an optimizedsolution for most of memory controllers verification environmentsis a great challenge owing to the harshness in building and reusingresources, the numerous protocols that the verifier should beaware of and the high number of iterations to reach full functionalcoverage. The generic environment offers several advantages, especially regarding the number of tests and sequences developedto achieve full coverage. The generic environment also providesthe versatility of using pre-developed UVM architectures thateventually contribute in achieving much less developing time forthe whole design process. Throughout the architecture, we will beusing new techniques and state-of-the-art developed blocks toachieve the highest coverage closure time as well as an innovativeway to build a reference model and how to efficiently utilize andaccelerate the scoreboard checking process.