Design of an active polyphase filter in GSM receiver with low-IF topologies

This paper describes the design of a polyphase filter in GSM receiver with low-IF topologies, using the circuit scheme of active-RC with the performance of single chip integrated. Based on TSMC 0.18 ¿m CMOS process, the Spectre simulation results indicate that the filter is centered at 110 kHz with 200 kHz of bandwidth. It has a voltage gain of about 30 dB, an image rejection ratio of about 38 dB. The power consumption is 4.2 mW under a 3 V power supply.

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