An Efficient Implementation of the Entire Transforms in the H.264/AVC Encoder using VHDL

The H.264/AVC standard achieves remarkable higher compression performance than the previous MPEG and H.26X standards. One of the computationally intensive units in the MPEG and H.26X video coding families is the Discrete Cosine Transform (DCT). In this paper, we propose an efficient implementation of the DCT, inverse DCTs and the Hadamard transforms in the H.264/AVC encoder using VHDL. The synthesis results indicate that our implementation of the entire transforms achieves lower power, delay and area consumption compared to the existing architectures in the H.264/AVC encoder.

[1]  Gustavo A. Ruiz,et al.  An Efficient VLSI Architecture of Fractional Motion Estimation in H.264 for HDTV , 2011, J. Signal Process. Syst..

[2]  Neill W Campbell,et al.  Using Colour Gabor Texture Features for Scene Understanding , 1999 .

[3]  Yang Song,et al.  A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC , 2008, J. Signal Process. Syst..

[4]  Itu-T and Iso Iec Jtc.  Advanced video coding for generic audiovisual services , 2010 .

[5]  Tokunbo Ogunfunmi,et al.  A new hardware implementation of the H.264 8×8 transform and quantization , 2009, 2009 IEEE International Conference on Acoustics, Speech and Signal Processing.

[6]  F. Zargari,et al.  A hardware sharing architecture for implementing the entire transforms in H.264/AVC video coding standard , 2011, 2011 IEEE 15th International Symposium on Consumer Electronics (ISCE).

[7]  W. Liebsch,et al.  Parallel architecture for VLSI implementation of a 2-dimensional discrete cosine transform for image coding , 1989 .

[8]  J. Raja Paul Perinbam,et al.  FPGA Implementation of Integer Transform and Quantizer for H.264 Encoder , 2008, J. Signal Process. Syst..

[9]  Ahmed Ben Atitallah,et al.  FPGA architecture of the LDPS Motion Estimation for H.264/AVC Video Coding , 2012, J. Signal Process. Syst..

[10]  Suchendranath Popuri,et al.  Design and Implementation of Transform and Quantization Blocks of H.264 Video Encoder using VHDL and MATLAB , 2013 .

[11]  Kaushik Roy,et al.  A Low Complexity Reconfigurable DCT Architecture to Trade off Image Quality for Power Consumption , 2008, J. Signal Process. Syst..

[12]  Henrique S. Malvar,et al.  Low-complexity transform and quantization in H.264/AVC , 2003, IEEE Trans. Circuits Syst. Video Technol..

[13]  Zhongfeng Wang,et al.  An improved scaled DCT architecture , 2009, IEEE Transactions on Consumer Electronics.