Precisely timed IEMI fault injection synchronized with EM information leakage

This paper presents a new intentional electromagnetic interference (IEMI) fault injection method that can be used to inject transient faults into cryptographic operations with precise timing from a distance. Such IEMI fault injection can be used for performing fault analysis attacks, such as differential fault analysis and fault sensitivity analysis, and therefore it could pose a severe threat to various cryptographic devices for which it is assumed that attackers cannot acquire direct access. In the proposed IEMI fault injection method, a block (i.e., a period) of sinusoidal waves is injected via cables attached to a cryptographic device, instead of using electromagnetic pulses as in conventional methods. The injected EM waves have a temporary impact on the cryptographic module but not on other components of the device. In addition, the proposed method employs EM information leaked from the cryptographic module as the trigger signal for fault injection. In this paper, we demonstrate experimentally that the proposed method can be used to inject precisely timed faults into the final round of an AES operation.

[1]  Frank Leferink Signal to noise transformation, the key to EMC , 1994, Proceedings of IEEE Symposium on Electromagnetic Compatibility.

[2]  Eli Biham,et al.  Differential Fault Analysis of Secret Key Cryptosystems , 1997, CRYPTO.

[3]  Richard J. Lipton,et al.  On the Importance of Checking Cryptographic Protocols for Faults (Extended Abstract) , 1997, EUROCRYPT.

[4]  Jean-Pierre Seifert,et al.  Fault Based Cryptanalysis of the Advanced Encryption Standard (AES) , 2003, Financial Cryptography.

[5]  Sung-Ming Yen,et al.  Differential Fault Analysis on AES Key Schedule and Some Coutnermeasures , 2003, ACISP.

[6]  Jean-Jacques Quisquater,et al.  A Differential Fault Attack Technique against SPN Structures, with Application to the AES and KHAZAD , 2003, CHES.

[7]  Sylvain Guilley,et al.  Silicon-level Solutions to Counteract Passive and Active Attacks , 2008, 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography.

[8]  Michael Hutter,et al.  RFID and Its Vulnerability to Faults , 2008, CHES.

[9]  Takeshi Sugawara,et al.  EMC ’ 09 / Kyoto Spectrum Analysis of Cryptographic Modules to Counteract Side-Channel Attacks , 2009 .

[10]  Sylvain Guilley,et al.  WDDL is Protected against Setup Time Violation Attacks , 2009, 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

[11]  Junko Takahashi,et al.  Practical Fault Attack on a Cryptographic LSI with ISO/IEC 18033-3 Block Ciphers , 2009, 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).

[12]  Yang Li,et al.  Fault Sensitivity Analysis , 2010, CHES.

[13]  David Naccache,et al.  Single-bit DFA using multiple-byte laser fault injection , 2010, 2010 IEEE International Conference on Technologies for Homeland Security (HST).

[14]  Takeshi Sugawara,et al.  An on-chip glitchy-clock generator for testing fault injection attacks , 2011, Journal of Cryptographic Engineering.

[15]  Yang Li,et al.  On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined Setting , 2011, CHES.

[16]  Daisuke Suzuki,et al.  Circuit Simulation for Fault Sensitivity Analysis and Its Application to Cryptographic LSI , 2012, 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography.

[17]  Y. Hayashi,et al.  Transient IEMI Threats for Cryptographic Devices , 2013, IEEE Transactions on Electromagnetic Compatibility.

[18]  Yang Zhang,et al.  Optical Fault Injection Attacks against Cipher Chip , 2014 .