On the computational power of WECPAR

Reconfigurable models were shown to be very powerful in solving many problems faster than non-reconfigurable models. WECPAR $$W(M,N,k)$$W(M,N,k) is an $$M\times N$$M×N reconfigurable model that has point-to-point reconfigurable interconnection with $$k$$k wires between neighboring processors. This paper studies several aspects of WECPAR. We first consider solving the list ranking problem on WECPAR. Some of the results obtained show that, ranking one element in a list of $$N$$N elements can be solved on $$W(N,N,N)$$W(N,N,N) WECPAR in $$O(1)$$O(1) time. Also, on $$W(N,N,k)$$W(N,N,k), ranking a list $$L(N)$$L(N) of $$N$$N elements can be done in $$O((\log N)(\lceil {\log _{k+1} N} \rceil ))$$O((logN)(⌈logk+1N⌉)) time. Then, we assess the relative computational power of WECPAR and transfer a large body of algorithms to work directly on WECPAR. We introduce several simulation algorithms between WECPAR and well-known models such as PRAM and RMBM. Simulation algorithms show that a PRIORITY CRCW PRAM $$P(N,S)$$P(N,S) of $$N$$N processors and $$S$$S shared memory locations can be simulated on $$W(S,N,k)$$W(S,N,k) WECPAR in $$O(\lceil {\log _{k+1} N}\rceil +\lceil {\log _{k+1} S}\rceil )$$O(⌈logk+1N⌉+⌈logk+1S⌉) time. Also, we show that a PRIORITY CRCW basic RMBM($$P,B)$$P,B), of $$P$$P processors and $$B$$B buses can be simulated on $$W(B, P+B, k)$$W(B,P+B,k) WECPAR in $$O(\lceil {\log _{k+1} (P+B)}\rceil )$$O(⌈logk+1(P+B)⌉) time. This directly migrate a large number of algorithms to work on WECPAR with the simulation overhead.