CMOS switched-op-amp-based sample-and-hold circuit

This paper presents a sample-and-hold design that is based on a switched-op-amp topology. Charge injection errors are greatly reduced by turning off transistors in the saturation region instead of the triode region as is the case for traditional MOS switches. The remaining clock feed through error is mostly signal-independent and is cancelled out by a pseudodifferential topology. Switched-opamps are designed and fabricated in a 2-/spl mu/ CMOS technology. The measurement results show that the harmonics are at least 78 dB below the signal level. Both the measurement results from fabricated ICs and simulation results suggest the potential benefits of this approach in comparison to traditional switched-capacitor circuits.

[1]  B. Wooley,et al.  A high-speed sample-and-hold technique using a Miller hold capacitance , 1991, Digest of Technical Papers., 1990 Symposium on VLSI Circuits.

[2]  W. Guggenbuhl,et al.  Dummy transistor compensation of analog MOS switches , 1989 .

[3]  Bruce A. Wooley,et al.  A 10-bit video BiCMOS track-and-hold amplifier , 1989 .

[4]  Andrea Baschirotto,et al.  A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz , 1997 .

[5]  Aaas News,et al.  Book Reviews , 1893, Buffalo Medical and Surgical Journal.

[6]  Mahesh B. Patil,et al.  Measurement and analysis of charge injection in MOS analog switches , 1987 .

[7]  Guido Torelli,et al.  A CMOS sample and hold for high-speed ADCs , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[8]  Alan B. Grebene,et al.  Analog Integrated Circuit Design , 1978 .

[9]  Gabor C. Temes,et al.  A high-frequency track-and-hold stage with offset and gain compensation , 1995 .

[10]  Willy Sansen,et al.  Single versus complementary switches: a discussion of clock feedthrough in S.C. circuits , 1986, ESSCIRC '86: Twelfth European Solid-State Circuits Conference.

[11]  D.A. Hodges,et al.  All-MOS charge-redistribution analog-to-digital conversion techniques. II , 1975, IEEE Journal of Solid-State Circuits.

[12]  Michiel Steyaert,et al.  Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages , 1994, IEEE J. Solid State Circuits.

[13]  Eric A. Vittoz,et al.  Charge injection in analog MOS switches , 1987 .

[14]  David A. Johns,et al.  Analog Integrated Circuit Design , 1996 .

[15]  P. Gray,et al.  All-MOS charge redistribution analog-to-digital conversion techniques. I , 1975, IEEE Journal of Solid-State Circuits.