Computing the Transmission Line Parameters of an On-chip Multiconductor Digital Bus

The task execution on modern digital integrated circuits requires internal data rates in the range of several gigabit per second. On the other hand circuit miniaturization leads to greater resistance of the digital interconnection bus conductors. Therefore the auto-interference effects like pulse distortion along the line and crosstalk increase and become a limiting factor for the bus performance. In order to optimize the data throughput along such an interconnection line coding techniques can be implemented [1]. The design of these methods requires an estimation of the autointerference effects. In this work a quasi-analytical model of an on-chip digital bus with equidistant conductors of equal cross section is presented. The quasi-static parameters are computed under the assumption for symmetry using even-odd mode analysis [2] and Schwarz-Cristoffel transformation [3, 4]. The obtained results are used to solve the multiconductor transmission line equations in frequency domain, thus obtaining the frequency response of the digital interconnect [5]. Then the pulse distortion is computed using Fourier transformation. The obtained data have been verified using full-wave analysis and SPICE simulation of the lumped-element equivalent circuit of the interconnection bus. The problem of estimating the electrostatic parameters of an interconnection bus reduces to computation of rectangular coupled lines between parallel grounded plates. The first attempts for analytical modelling of such structures were based on the assumption of zero conductor thicknesses and adding a correction term for the finite thickness case. Cohn, for example, has calculated the transmission line parameters for the zero-thickness case using conformal mapping methods [6]. Getsinger has extended Cohn’s work to computing the fringing field capacitances at the conductor edges, but he has imposed restrictions on the conductor dimensions [7].