A System on a Chip (SoC) is presented with the end application being RF and digital control of an Active Array Electronically Scanned Array (AESA) Antenna. The design is implemented using IBM's SiGe 5HP process. The device operates across X-Band in both transmit and receive and maintains a gain flatness of 0.5 dB across the band in transmit and has 12 dB of linear gain in receive. The design also provides an interface and logic control for advanced AESA functionality including fail safe operation at power up, power interrupt, and shut down. The logic permits independent control over transmit and receive states. The chip incorporates a 6-bit phase shifter, a 5-bit attenuator with gain amplification, and switching; it replaces three separate MMICs and a digital ASIC.
[1]
R. Tayrani,et al.
Broad-band SiGe MMICs for phased-array radar applications
,
2003
.
[2]
R. Tayrani,et al.
X-band SiGe monolithic control circuits
,
1998,
1998 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. Digest of Papers (Cat. No.98EX271).
[3]
G. Sakamoto,et al.
A SiGe MMIC 6-bit PIN diode phase shifter
,
2002,
IEEE Microwave and Wireless Components Letters.
[4]
A. Puzella,et al.
Air-Cooled, Active Transmit/Receive Panel Array
,
2007,
2007 IEEE Radar Conference.
[5]
Mike Sarcione,et al.
Technology trends for future low cost phased arrays
,
2010,
2010 IEEE MTT-S International Microwave Symposium.