Circuit Description and Design Flow of Superconducting SFQ Logic Circuits

SUMMARY Superconducting Single-Flux-Quantum (SFQ) devices have been paid much attention as alternative devices for digital circuits, because of their high switching speed and low power consumption. For large-scale circuit design, the role of computer-aided design environment is significant. As the characteristics of the SFQ devices are different from conventional devices, a new design environment is required. In this paper, we propose a new timing-aware circuit description method which can be used for SFQ circuit design. Based on the description and the dedicated algorithms we have been developing for SFQ logic circuit design, we propose an integrated design flow for SFQ logic circuits. We have designed a circuit using our developed design tools along with the design flow and demonstrated the correct operation.

[1]  Kazuyoshi Takagi,et al.  Layout-Driven Skewed Clock Tree Synthesis for Superconducting SFQ Circuits , 2011, IEICE Trans. Electron..

[2]  Kazuyoshi Takagi,et al.  Logic Synthesis Method for Dual-Rail RSFQ Digital Circuits Using Root-Shared Binary Decision Diagrams , 2007, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

[3]  Kazuyoshi Takagi,et al.  Automated Passive-Transmission-Line Routing Tool for Single-Flux-Quantum Circuits Based on A* Algorithm , 2010, IEICE Trans. Electron..

[4]  Y. Yamanashi,et al.  Design, Implementation and On-Chip High-Speed Test of SFQ Half-Precision Floating-Point Multiplier , 2009, IEEE Transactions on Applied Superconductivity.

[5]  Kazuyoshi Takagi,et al.  Design Method of Dual-Rail RSFQ Logic Circuits Using 2×2-Join , 2005 .

[6]  Takagi Naofumi,et al.  Automated Routing Method for Multi-Layer SFQ Circuits , 2008 .

[7]  N. Yoshikawa,et al.  Planarization Process for Fabricating Multi-Layer Nb Integrated Circuits Incorporating Top Active Layer , 2009, IEEE Transactions on Applied Superconductivity.

[8]  V. Semenov,et al.  RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.

[9]  Kazuyoshi Takagi,et al.  A Clock Scheduling Algorithm for High-Throughput RSFQ Digital Circuits , 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

[10]  Y. Yamanashi,et al.  Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, ${\rm CORE}1\beta$ , 2007, IEEE Transactions on Applied Superconductivity.

[11]  Nobutaka Kito,et al.  Timing-aware description methods and gate-level simulation of single flux quantum logic circuits , 2012 .

[12]  Y. Kameda,et al.  A New Design Methodology for Single-Flux-Quantum (SFQ) Logic Circuits Using Passive-Transmission-Line (PTL) Wiring , 2007, IEEE Transactions on Applied Superconductivity.

[13]  Kazuyoshi Takagi,et al.  A Method of Sequential Circuit Synthesis Using One-Hot Encoding for Single-Flux-Quantum Digital Circuits , 2007, IEICE Trans. Electron..

[14]  Y. Yamanashi,et al.  Design and Implementation and On-Chip High-Speed Test of SFQ Half-Precision Floating-Point Adders , 2009, IEEE Transactions on Applied Superconductivity.

[15]  Yuki Yamanashi,et al.  100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process , 2010, IEICE Trans. Electron..