BOUNDED MODEL CHECKING FOR VERIFYING CONCURRENT PROGRAMS
暂无分享,去创建一个
[1] Moshe Y. Vardi. Branching vs. Linear Time: Final Showdown , 2001, TACAS.
[2] M. F.,et al. Bibliography , 1985, Experimental Gerontology.
[3] Philippe Schnoebelen,et al. Systems and Software Verification, Model-Checking Techniques and Tools , 2001 .
[4] T. Schlipf,et al. Formal verification made easy , 1997, IBM J. Res. Dev..
[5] Marko Mäkelä. A REACHABILITY ANALYSER FOR ALGEBRAIC SYSTEM NETS , 2001 .
[6] Javier Esparza,et al. Implementing LTL model checking with net unfoldings , 2001, SPIN '01.
[7] Fred Kröger. LAR: A logic of algorithmic reasoning , 2004, Acta Informatica.
[8] Alfred V. Aho,et al. Compilers: Principles, Techniques, and Tools , 1986, Addison-Wesley series in computer science / World student series edition.
[9] Michael Baldamus,et al. p2b: a translation utility for linking promela and symbolic model checking (tool paper) , 2001, SPIN '01.
[10] Joseph Y. Halpern,et al. “Sometimes” and “not never” revisited: on branching versus linear time temporal logic , 1986, JACM.
[11] K. Nurmela,et al. COVERING A SQUARE WITH UP TO 30 EQUAL CIRCLES , 2000 .
[12] Anna Philippou,et al. Tools and Algorithms for the Construction and Analysis of Systems , 2018, Lecture Notes in Computer Science.
[13] Sérgio Vale Aguiar Campos,et al. Symbolic Model Checking , 1993, CAV.
[14] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[15] John McCarthy,et al. SOME PHILOSOPHICAL PROBLEMS FROM THE STANDPOINT OF ARTI CIAL INTELLIGENCE , 1987 .
[16] Martin Peschke,et al. Design and Validation of Computer Protocols , 2003 .
[17] Rod M. Burstall,et al. Program Proving as Hand Simulation with a Little Induction , 1974, IFIP Congress.
[18] Bjarne Stroustrup,et al. C++ Programming Language , 1986, IEEE Softw..
[19] Fausto Giunchiglia,et al. NUSMV: A New Symbolic Model Verifier , 1999, CAV.
[20] Fred Kröger,et al. Temporal Logic of Programs , 1987, EATCS Monographs on Theoretical Computer Science.
[21] A. Prasad Sistla,et al. On characterization of safety and liveness properties in temporal logic , 1985, ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing.
[22] Per Bjesse,et al. Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers , 2001, CAV.
[23] Armin Biere,et al. Verifiying Safety Properties of a Power PC Microprocessor Using Symbolic Model Checking without BDDs , 1999, CAV.
[24] Daniel Jackson,et al. Alloy: a lightweight object modelling notation , 2002, TSEM.
[25] G.E. Moore,et al. Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.
[26] Monika Maidl,et al. The Common Fragment of CTL and LTL , 2000, FOCS.
[27] Tommi A. Junttila. SYMMETRY REDUCTION ALGORITHMS FOR DATA SYMMETRIES , 2002 .
[28] Daniel Jackson,et al. Finding bugs with a constraint solver , 2000, ISSTA '00.
[29] Keijo Heljanko,et al. Bounded Reachability Checking with Process Semantics , 2001, CONCUR.
[30] Doron A. Peled,et al. Using partial-order methods in the formal validation of industrial concurrent programs , 1996, ISSTA '96.
[31] Javier Esparza,et al. A New Unfolding Approach to LTL Model Checking , 2000, ICALP.
[32] T. Aura. AUTHORIZATION AND AVAILABILITY - ASPECTS OF OPEN NETWORK SECURITY , 2000 .
[33] Armin Biere,et al. Symbolic Model Checking without BDDs , 1999, TACAS.
[34] Petteri Kaski,et al. ISOMORPH-FREE EXHAUSTIVE GENERATION OF COMBINATORIAL DESIGNS , 2002 .
[35] Leslie Lamport,et al. "Sometime" is sometimes "not never": on the temporal logic of programs , 1980, POPL '80.
[36] Bart Selman,et al. Planning as Satisfiability , 1992, ECAI.
[37] A. Prasad Sistla,et al. The complexity of propositional linear temporal logics , 1982, STOC '82.
[38] Editors , 1986, Brain Research Bulletin.
[39] Tuomas Aura,et al. Privacy and Accountability in Certificate Systems , 2000 .
[40] Timo Latvala,et al. MODEL CHECKING LINEAR TEMPORAL LOGIC PROPERTIES OF PETRI NETS WITH FAIRNESS CONSTRAINTS , 2001 .