论文信息 - CMOS four-quadrant multiplier using bias feedback techniques

CMOS four-quadrant multiplier using bias feedback techniques

A new wide-range CMOS four-quadrant multiplier using the bias feedback techniques is presented. Simulation results show that for a power supply of /spl plusmn/5 V, the linear range is over 14 V and the linearity error is less than 1% over a 13 V input range. Experimental results show that the linear range is over /spl plusmn/1 V. The results will be useful in analog signal processing applications. >

Shen-Iuan Liu | Yuh-Shyan Hwang

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