Closing the gap between ASIC and custom: an ASIC perspective

We investigate the differences in speed between application-specific integrated circuits and custom integrated circuits when each are implemented in the same process technology, with some examples in 0.25 micron CMOS. We first attempt to account for the elements that make the performance different and then examine ways in which tools and methodologies may close the performance gap between application-specific integrated circuits and custom circuits.

[1]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[2]  Improving cell libraries for synthesis , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[3]  Yosinori Watanabe,et al.  A delay model for logic synthesis of continuously-sized networks , 1995, ICCAD.

[4]  Rajendran Panda,et al.  Library-less synthesis for static CMOS combinational logic circuits , 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[5]  M.A. Horowitz,et al.  Skew-tolerant domino circuits , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[6]  Narendra V. Shenoy,et al.  Discrete drive selection for continuous sizing , 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

[7]  Larry L. Biro,et al.  Power considerations in the design of the Alpha 21264 microprocessor , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[8]  Richard E. Kessler,et al.  The Alpha 21264 microprocessor architecture , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

[9]  Chris J. McDonald,et al.  The Evolution of Intel s Copy EXACTLY ! Technology Transfer Method , 1998 .

[10]  Martin D. F. Wong,et al.  Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[11]  C. Sechen,et al.  Domino logic synthesis using complex static gates , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[12]  Andrew Liang Ping Chang VLSI datapath choices : cell-based versus full-custom , 1998 .

[13]  Kevin J. Nowka,et al.  Design methodology for a 1.0 GHz microprocessor , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

[14]  A. Brand,et al.  ’ s 0 . 25 Micron , 2 . 0 Volts Logic Process Technology , 1998 .

[15]  R. Allmon,et al.  High-performance microprocessor design , 1998, IEEE J. Solid State Circuits.

[16]  Kevin J. Nowka,et al.  Circuit design techniques for a gigahertz integer microprocessor , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).