Simulation of random telegraph Noise with 2-stage equivalent circuit

With the continuous reduction of CMOS device dimension, the importance of Random Telegraph Noise (RTN) keeps growing. To determine its impact on circuit performance and optimize the design, it is essential to physically model RTN effect and embed it into the standard simulation environment. In this paper, a new simulation method of time domain RTN effect is proposed to benchmark important digital circuits: (1) A two-stage L-shaped circuit is proposed to generate RTN signal by integrating a white noise source. An L-shaped circuit is a RC filter connected with an ideal comparator, where RC values are calibrated with the physical property of RTN; (2) This sub-circuit is fully compatible with SPICE, enabling the time domain analysis in nanometer scale digital design; (3) The importance of discrete RTN is demonstrated on a 32nm SRAM design and a 22nm low power ring oscillator (RO), using the proposed method. As compared to traditional 1/f noise, the impact of RTN is more significant under low voltages, leading to tremendous differences in the prediction of Vccmin and failure probability in SRAM, as well as jitter noise in RO.

[1]  Yu Cao,et al.  New Generation of Predictive Technology Model for Sub-45 nm Early Design Exploration , 2006, IEEE Transactions on Electron Devices.

[2]  Yung-Huei Lee,et al.  RTS Noise Characterization in Flash Cells , 2008, IEEE Electron Device Letters.

[3]  D. Frank,et al.  Reduction of random telegraph noise in High-к / metal-gate stacks for 22 nm generation FETs , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[4]  Yu Cao,et al.  New generation of predictive technology model for sub-45nm design exploration , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

[5]  Tae-Hoon Lee,et al.  Monte Carlo Based Time-domain HSPICE Noise Simulation for CSA-CRRC Circuit , 2001 .

[6]  C. Hu,et al.  Compact modeling of flicker noise variability in small size MOSFETs , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[7]  Gilson I. Wirth,et al.  Statistical RTS model for digital circuits , 2009, Microelectron. Reliab..

[8]  K. Sonoda,et al.  Discrete Dopant Effects on Statistical Variation of Random Telegraph Signal Magnitude , 2007, IEEE Transactions on Electron Devices.

[9]  A. Kotabe,et al.  Anomalously Large Threshold Voltage Fluctuation by Complex Random Telegraph Signal in Floating Gate Flash Memory , 2006, 2006 International Electron Devices Meeting.

[10]  J.P. Campbell,et al.  Random telegraph noise in highly scaled nMOSFETs , 2009, 2009 IEEE International Reliability Physics Symposium.

[11]  G. Jung,et al.  Random telegraph noise analysis in time domain , 2000 .

[12]  M. Yamaoka,et al.  Impact of threshold voltage fluctuation due to random telegraph noise on scaled-down SRAM , 2008, 2008 IEEE International Reliability Physics Symposium.