Algorithm for vectorizing logic simulation and evaluation of 'VELVET' performance

A very-large-scale logic simulation engine called VELVET has been developed. VELVET is a vectorized event-driven simulator which can handle simultaneously both gate-level logic and register-transfer level structure. VELVET can process simulation jobs two orders of magnitude faster than a conventional gate-level simulator. A description is given of how to realize such high performance. An algorithm is presented for vectorizing the simulation and performance.<<ETX>>