Lock-in amplifier is widely used to detect weak signals from significant background noise. In this paper, an FPGA-based Lock-in amplifier is implemented on the DSP Builder platform to measure impedance between biological cells and electrodes. To improve the measuring accuracy, a narrow band low pass filter with low cut off frequency was implemented. This low pass filter consists of a five-stage cascaded integrator-comb filter, two half band filters and a FIR low pass filter. Simulation shows that with a system clock of 10MHz, the cut off frequency of the low pass filter is lower than 20Hz. Experiments demonstrate that the implemented lock-in amplifier is able to detect weak signal with strong noise, making it an attractive approach to implement lock-in amplifiers which is more flexible and can meet the needs for specified measurements.
[1]
E. Hogenauer,et al.
An economical class of digital filters for decimation and interpolation
,
1981
.
[2]
Richard D Rabbitt,et al.
Single cell electric impedance topography: mapping membrane capacitance.
,
2009,
Lab on a chip.
[3]
Angelo Geraci,et al.
Digital field programmable gate array-based lock-in amplifier for high-performance photon counting applications
,
2005
.
[4]
Stuart L. Johnson,et al.
Membrane capacitance measurement using patch clamp with integrated self-balancing lock-in amplifier
,
2002,
Pflügers Archiv - European Journal of Physiology.