Design of a Low-power Single-channel 8-Bit 1.25GSPS SAR ADC

Successive approximation register analog to digital converter (SAR ADC) has incomparable energy efficiency advantages over other types of ADC architectures for its high degree of digitalization and simple structure. Undergoing algorithm verification with MATLAB, a single-channel 8-bit 1.25GSPS SAR ADC structure is presented. Transistors level circuit has been designed using TSMC 28nm CMOS technology. The pre-simulation results with noise show that the core circuit has the ENOB 7.80bits, the power consumption 2.01mW, and the FOM value 6.29fJ/conv-step when operating at very high speed with sampling rate of 1.25GSPS under 1.2V supply.

[1]  S. Okwit,et al.  ON SOLID-STATE CIRCUITS. , 1963 .

[2]  Soon-Jyh Chang,et al.  A 9-Bit 150-MS/s Subrange ADC Based on SAR Architecture in 90-nm CMOS , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Chorng-Kuang Wang,et al.  A 8-bit 500-KS/s low power SAR ADC for bio-medical applications , 2007, 2007 IEEE Asian Solid-State Circuits Conference.

[4]  B.P. Ginsburg,et al.  500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC , 2007, IEEE Journal of Solid-State Circuits.

[5]  Tai-Cheng Lee,et al.  27.7 A 10b 2.6GS/s time-interleaved SAR ADC with background timing-skew calibration , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

[6]  Thomas Toifl,et al.  28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[7]  Soon-Jyh Chang,et al.  A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure , 2010, IEEE Journal of Solid-State Circuits.

[8]  Chao Yuan,et al.  A capacitor constructed bypass window switching scheme for energy-efficient SAR ADC , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

[9]  Chun-Cheng Liu,et al.  A 10-bit 320-MS/s low-cost SAR ADC for IEEE 802.11ac applications in 20-nm CMOS , 2014, 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC).

[10]  Soon-Jyh Chang,et al.  A 1-µW 10-bit 200-kS/s SAR ADC With a Bypass Window for Biomedical Applications , 2012, IEEE Journal of Solid-State Circuits.