A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing

Dynamic routing can substantially enhance the quality of service for multiprocessor communication, and can provide intelligent adaptation of faulty links during run time. Implementing dynamic routing on a network-on-chip (NoC) platform requires a design that provides highly efficient optimal path computation coupled with reduced area and power consumption. In this paper, we present a hybrid analog-digital routing network design that enables efficient dynamic routing on an NoC architecture. The digital part provides accurate real-time traffic estimation using a temporal cost evaluation and adaptation scheme. The analog network, which is distributed within the digital communication network, provides an efficient implementation for the optimal routing algorithm with extremely low power consumption. Our results demonstrate the effectiveness of the hybrid analog-digital design, with a significant improvement in latency over the static routing for random hot spot traffics

[1]  Michel Verleysen,et al.  A current-mode CMOS loser-take-all with minimum function for neural computations , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[2]  Tobias Bjerregaard,et al.  A survey of research and practices of Network-on-chip , 2006, CSUR.

[3]  K. P. Lam,et al.  Closed semiring connectionist network for the Bellman-Ford computation , 1996 .

[4]  Luca Benini,et al.  Network-on-chip architectures and design methods , 2005 .

[5]  Bernabé Linares-Barranco,et al.  A high-precision current-mode WTA-MAX circuit with multichip capability , 1998 .

[6]  Radu Marculescu,et al.  DyAD - smart routing for networks-on-chip , 2004, Proceedings. 41st Design Automation Conference, 2004..

[7]  Christofer Toumazou,et al.  Analogue IC design : the current-mode approach , 1993 .

[8]  William J. Dally,et al.  Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels , 1993, IEEE Trans. Parallel Distributed Syst..

[9]  D. R. Fulkerson,et al.  Flows in Networks. , 1964 .

[10]  Frederick S. Hillier,et al.  Introduction of Operations Research , 1967 .

[11]  Richard Bellman,et al.  ON A ROUTING PROBLEM , 1958 .

[12]  J. Little.  A Proof for the Queuing Formula: L = λW , 1961 .

[13]  Chi-Sang Poon,et al.  A Current-Mode Analog Circuit for Reinforcement Learning Problems , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[14]  John N. Tsitsiklis,et al.  Parallel and distributed computation , 1989 .

[15]  Frederick S. Hillier,et al.  Introduction to operations research / Frederick S.Hillier and Gerald J. Lieberman , 2004 .

[16]  G. Pearce,et al.  Analogue IC Design: the Current Mode Approach , 1992 .

[17]  Mohammed Ismail,et al.  Analog VLSI Implementation of Neural Systems , 2011, The Kluwer International Series in Engineering and Computer Science.

[18]  Fernando Gehm Moraes,et al.  HERMES: an infrastructure for low area overhead packet-switching networks on chip , 2004, Integr..