Multi-TSV Crosstalk Channel Equalization with Non-uniform Quantization

Signal transmission in 3D integrated circuits (ICs) over through-silicon via (TSV) links inherently creates coupling interference on signal TSVs. This interference can be a crucial factor for the functional correctness of 3D ICs and therefore needs to be considered in future chip designs.In this overview chapter we propose a novel multi-TSV channel equalization method deployed in the digital domain, allowing almost perfect compensation of the crosstalk by inverting the impact of the individual coupling channels. The proposed equalization technique is carried out for a TSV-to-TSV scenario with realistic I/O termination, and the corresponding performance is analyzed under consideration of analog-to-digital converter (ADC) impairments and different uniform and non-uniform quantization approaches. The results show, that even in the presence of significant ADC clock jitter and tight ADC quantization restrictions, remarkable crosstalk mitigation can be accomplished.

[1]  Gerhard Fettweis,et al.  Multi-TSV crosstalk compensation based on digital MIMO channel equalization , 2014, 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems.

[2]  Soha Hassoun,et al.  Through-Silicon Via (TSV)-induced noise characterization and noise mitigation using coaxial TSVs , 2009, 2009 IEEE International Conference on 3D System Integration.

[3]  Junho Lee,et al.  Modeling and Analysis of Through-Silicon Via (TSV) Noise Coupling and Suppression Using a Guard Ring , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[4]  Payman Zarkesh-Ha,et al.  Impact of three-dimensional architectures on interconnects in gigascale integration , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[5]  Ghassan Kawas Kaleh Channel Equalization for Block Transmission Systems , 1995, IEEE J. Sel. Areas Commun..

[6]  P. F. Panter,et al.  Quantization distortion in pulse-count modulation with nonuniform spacing of levels , 1951, Proceedings of the IRE.

[7]  Joungho Kim,et al.  Through silicon via (TSV) equalizer , 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

[8]  Tzong-Lin Wu,et al.  Novel crosstalk modeling for multiple through-silicon-vias (TSV) on 3-D IC: Experimental validation and application to Faraday cage design , 2012, 2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems.

[9]  Gerhard Fettweis,et al.  A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS , 2012, 2012 IEEE International Solid-State Circuits Conference.

[10]  Seungyoung Ahn,et al.  Analysis of TSV-to-TSV coupling with high-impedance termination in 3D ICs , 2011, 2011 12th International Symposium on Quality Electronic Design.