A 30-V, 75-m/spl Omega/*mm/sup 2/ power MOSFET for intelligent driver LSIs

An extremely low on-resistance Lateral DSA MOSFET(LDM0S) is developed for intelligent driver LSIs. This device has an improved meshed gate structure with double-layer A1 electrodes. Drain offset layer doping is introduced to decrease drain series resistance, and an A1 field plate is formed by the first A1 layer to reduce electric field at the substrate surface. A 30-V breakdown voltage and a 75-m!2=mm2 onresistance are obtained in the device fabricated by a 1.5pm BiCMOS process. The on-resistance is reduced 20% compared with conventional devices. An H-bridge driver is designed using those devices, and a very lowpower dissipation is achieved.

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