Signal Processing for High-Speed Links

The steady growth in demand for bandwidth has resulted in data-rates in the 10s of Gb/s in back-plane and optical channels. Such high-speed links suffer from impairments such as dispersion, noise and nonlinearities. Due to the difficulty in implementing multi-Gb/s transmitters and receivers in silicon, conventionally, high-speed links were implemented primarily with analog circuits employing minimal signal processing. However, the relentless scaling of feature sizes exemplified by Moore’s Law has enabled the application of sophisticated signal processing techniques to both back-plane and optical links employing mixed analog and digital architectures and circuits. As a result, over the last decade, signal processing has emerged as a key technology to the advancement of low-cost, high data-rate, back-plane and optical communication systems. In this chapter, we provide an overview of some of the driving factors that limit the performance of high-speed links, and highlight some of the potential opportunities for the signal processing and circuits community to make substantial contributions in the modeling, design and implementation of these systems.

[1]  Mike Bichan,et al.  A 6.5 Gb/s backplane transmitter with 6-tap FIR equalizer and variable tap spacing , 2008, 2008 IEEE Custom Integrated Circuits Conference.

[2]  P. Humblet,et al.  On the bit error rate of lightwave systems with optical amplifiers , 1991 .

[3]  Wei Zhang,et al.  21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[4]  G. David Forney,et al.  Maximum-likelihood sequence estimation of digital sequences in the presence of intersymbol interference , 1972, IEEE Trans. Inf. Theory.

[5]  Paul Voois,et al.  A 90 nm CMOS DSP MLSD Transceiver With Integrated AFE for Electronic Dispersion Compensation of Multimode Optical Fibers at 10 Gb/s , 2008, IEEE Journal of Solid-State Circuits.

[6]  O.E. Agazzi,et al.  Maximum-likelihood sequence estimation in dispersive optical channels , 2005, Journal of Lightwave Technology.

[7]  Qian Yu,et al.  Electronic Data Processing for Error and Dispersion Compensation , 2006, Journal of Lightwave Technology.

[8]  Keshab K. Parhi,et al.  VLSI digital signal processing systems , 1999 .

[9]  Linda Dailey Paulson.  The Ins and Outs of New Local I/O Trends , 2003, Computer.

[10]  A. Haghighat,et al.  Performance of A 3 MCNP™ for Calculation of 3-D Neutron Flux Distribution in a BWR Core Shroud , 2001 .

[11]  Naresh R. Shanbhag,et al.  Soft digital signal processing , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[12]  Ali H. Sayed,et al.  Fundamentals and challenges of optical multiple-input multiple-output multimode fiber links - eScholarship , 2007 .

[13]  Naresh R. Shanbhag,et al.  Modeling and mitigation of jitter in multiGbps source-synchronous I/O links , 2003, Proceedings 21st International Conference on Computer Design.

[14]  M. Takamiya,et al.  12Gb/s duobinary signaling with /spl times/2 oversampled edge equalization , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[15]  W.J. Dally,et al.  Low-power area-efficient high-speed I/O circuit techniques , 2000, IEEE Journal of Solid-State Circuits.

[16]  Richard D. Gitlin,et al.  Electrical signal processing techniques in long-haul fiber-optic systems , 1990, IEEE Trans. Commun..

[17]  Zhuhong Zhang,et al.  Wavelength Division Multiplexing (WDM) and Polarization Mode Dispersion (PMD) Performance of a Coherent 40Gbit/s Dual-Polarization Quadrature Phase Shift Keying (DP-QPSK) Transceiver , 2007, OFC 2007.

[18]  Sergio Benedetto,et al.  Digital Transmission Theory , 1987 .

[19]  M. Elmasry,et al.  An electrically pre-equalized 10-Gb/s duobinary transmission system , 2005, Journal of Lightwave Technology.

[20]  John Cocke,et al.  Optimal decoding of linear codes for minimizing symbol error rate (Corresp.) , 1974, IEEE Trans. Inf. Theory.

[21]  Paul Voois,et al.  A 90nm CMOS DSP MLSD Transceiver with Integrated AFE for Electronic Dispersion Compensation of Multi-mode Optical Fibers at 10Gb/s , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[22]  R. Mooney,et al.  An 8Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation and clock deskew , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[23]  R.A. Griffin.  Integrated DQPSK transmitters , 2005, OFC/NFOEC Technical Digest. Optical Fiber Communication Conference, 2005..

[24]  Gu-Yeon Wei,et al.  An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-/spl mu/m CMOS , 2003 .

[25]  G. Keiser.  Optical Fiber Communications , 1983 .

[26]  Hyeon-Min Bae,et al.  An MLSE Receiver for Electronic Dispersion Compensation of OC-192 Fiber Links , 2006, IEEE Journal of Solid-State Circuits.

[27]  T.N. Nielsen,et al.  Duobinary transmitter with low intersymbol interference , 1998, IEEE Photonics Technology Letters.

[28]  M. Karlsson.  Probability density functions of the differential group delay in optical fiber communication systems , 2001 .

[29]  Thomas Krause,et al.  A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[30]  Stuart,et al.  Dispersive multiplexing in multimode optical fiber , 2000, Science.

[31]  V. Stojanovic,et al.  Channel Coding For High-Speed Links: A Systematic Look at Code Performance and System Simulation , 2009, IEEE Transactions on Advanced Packaging.

[32]  Jri Lee,et al.  Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data , 2008, IEEE Journal of Solid-State Circuits.

[33]  S. Qureshi,et al.  Adaptive equalization , 1982, Proceedings of the IEEE.

[34]  Vladimir Stojanovic,et al.  Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication , 2004, 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577).

[35]  Teresa H. Meng,et al.  A 140-Mb/s, 32-state, radix-4 Viterbi decoder , 1992 .

[36]  Andrew C. Singer,et al.  Electronic dispersion compensation , 2008, IEEE Signal Processing Magazine.

[37]  Ali H. Sayed,et al.  Fundamentals and challenges of optical multiple-input multiple-output multimode fiber links [Topics in Optical Communications] , 2007, IEEE Communications Magazine.

[38]  G. Agrawal.  Fiber‐Optic Communication Systems , 2021 .

[39]  R.L. Narasimha,et al.  Forward error correction for high-speed I/O , 2008, 2008 42nd Asilomar Conference on Signals, Systems and Computers.