Fault-simulation methods — extensions and comparison
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[1] R. L. Wadsack,et al. Fault modeling and logic simulation of CMOS and MOS integrated circuits , 1978, The Bell System Technical Journal.
[2] Premachandran R. Menon,et al. Functional simulation in the lamp system , 1976, DAC '76.
[3] Edward B. Eichelberger,et al. Hazard Detection in Combinational and Sequential Switching Circuits , 1964, IBM J. Res. Dev..
[4] P. R. Menon,et al. Accurate logic simulation models for TTL totempole and MOS gates and tristate devices , 1981, The Bell System Technical Journal.
[5] Stephen A. Szygenda. TEGAS2—anatomy of a general purpose TEST GENERATION AND SIMULATION system for digital logic , 1972, DAC '72.
[6] Melvin A. Breuer,et al. Concurrent fault simulation and functional level modeling , 1977, DAC '77.
[7] S. G. Chappell,et al. Lamp: Logic-circuit simulators , 1974 .
[8] Stephen A. Szygenda,et al. A model and implementation of a universal time delay simulator for large digital nets , 1970, AFIPS '70 (Spring).
[9] Douglas B. Armstrong,et al. A Deductive Method for Simulating Faults in Logic Circuits , 1972, IEEE Transactions on Computers.
[10] Sundaram Seshu,et al. On an Improved Diagnosis Program , 1965, IEEE Trans. Electron. Comput..
[11] Michael Yoeli,et al. Application of Ternary Algebra to the Study of Static Hazards , 1964, JACM.
[12] Melvin A. Breuer,et al. Vector representation of switching and three-valued functions , 1978, MVL '78.
[13] Herbert Y. Chang,et al. Comparison of Parallel and Deductive Fault Simulation Methods , 1974, IEEE Transactions on Computers.
[14] Ernst G. Ulrich,et al. Concurrent simulation of nearly identical digital networks , 1974, Computer.
[15] Premachandran R. Menon,et al. Deductive Fault Simulation with Functional Blocks , 1978, IEEE Transactions on Computers.
[16] S. G. Chappell. Simulation of large asynchronous logic circuits using an ambiguous gate model , 1899 .