The Cross-Coupled Pair - Part II [A Circuit for All Seasons]

Following a general overview of the cross-coupled pair (XCP) in the last issue, we begin to study specific circuit examples incorporating this topology. We deal with digital applications in this issue.

[1]  J. Bock,et al.  42 GHz static frequency divider in a Si/SiGe bipolar technology , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[2]  Michael J. Demler High-speed analog-to-digital conversion , 1991 .

[3]  J. Schlageter,et al.  A 4K static 5-V RAM , 1976, 1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[4]  A. Mohsen,et al.  A 80ns 64K DRAM , 1983, 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[5]  Payam Heydari,et al.  Design of ultra high-speed CMOS CML buffers and latches , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  T. Tsujide,et al.  A battery backup 64K CMOS RAM with double level aluminum technology , 1983, 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[7]  A. Renninger,et al.  A 16K dynamic RAM , 1976, 1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[8]  L. Heller,et al.  Cascode voltage switch logic: A differential CMOS logic family , 1984, 1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[9]  J. Yamada,et al.  Submicron VLSI memory circuits , 1983, 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[10]  S. Kohyama,et al.  A 64Kb CMOS RAM , 1982, 1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.