A knowledge based system for embedding DFT‐methodologies

The application of the DFT (design for testability) technique to VLSI circuits is a difficult procedure, since it requires the knowledge concerning the application environment, effectiveness and cost of individual techniques. This paper discusses an automatic embedding system for DFT techniques, dealing with the circuit at the functional block level. The system is constructed with the goal of easy implementation and modification of DFT functions. The use of a generalpurpose inference engine is assumed. DFT techniques as well as circuit structures are represented by a structured database, and the rules to be applied are represented by a rule base. When more than one DFT technique can be applied to a block to be tested, the one minimizing the cost function is adopted. The selection of the generator and compressor is accelerated by the use of a heuristic method. As DFT techniques, the exhaustive testing, locally exhaustive testing and random testing are implemented for combinational circuits. Universal testing, memory random testing and built-in memory testing are implemented for PLAs. OPS83 was used as the tool for construction.