Heuristics to compute variable orderings for efficient manipulation of ordered binary decision diagrams
暂无分享,去创建一个
Don E. Ross | M. Ray Mercer | Kenneth M. Butler | Rohit Kapur | R. Kapur | Kenneth M. Butler | Don E. Ross | M. Ray Mercer
[1] Randal E. Bryant,et al. Efficient implementation of a BDD package , 1991, DAC '90.
[2] Kenneth J. Supowit,et al. Finding the Optimal Variable Ordering for Binary Decision Diagrams , 1990, IEEE Trans. Computers.
[3] Albert R. Wang,et al. Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[4] F. Brglez,et al. A neutral netlist of 10 combinational benchmark circuits and a target translator in FORTRAN , 1985 .
[5] C. Leonard Berman. Ordered Binary Decision Diagrams and Circuit Structure Extended Abstract , 1989 .
[6] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[7] C. Leonard Berman,et al. Circuit width, register allocation, and ordered binary decision diagrams , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[8] L. H. Goldstein,et al. Controllability/observability analysis of digital circuits , 1978 .
[9] Masahiro Fujita,et al. Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[10] M. Ray Mercer,et al. Functional calculations using ordered partial multidecision diagrams , 1990 .
[11] M. R. Mercer,et al. Fast functional evaluation of candidate OBDD variable orderings , 1991, Proceedings of the European Conference on Design Automation..