Hardware Implementation of Artificial Neural Networks

Artificial Neural Networks (ANNs) have long been used to solve complex machine learning problems (“deep learning”). The inherent distributed component of ANNs in both memory and computation means that implementing them directly in hardware can allow large gains when scaling the newtork sizes, since the von Neuman bottleneck (computations limited by memory access time) does not have to distributed architectures. Therefore both analog and digital circuits have been used to implement these circuits without the use of a general purpose CPU architecture. Promising results have been obtained for various circuit architectures, with commercial applications close by. Challenges remain in the scaling of these networks, since the number of synapses grows quadratically, making wiring difficult. Novel devices, in particular different memristor-like devices, can be used to more efficiently design and fabricate ANNs, although the reliability of the fabrication remains to be demonstrated.