Rapid single flux quantum random access memory

A new design concept for the Josephson-junction random access memory (RAM) has been developed. In contrast to previous RAMs based on single flux quantization (SFQ), in our system READ and WRITE operations employ ballistic transfer of SFQ pulses along bit lines (either Josephson transmission lines, or passive superconducting microstrip lines, or their combination). The basic memory cells are the single-junction SQUIDs, connected serially by the bit lines and inductively coupled to word lines. READ and WRITE operations are performed by sending SFQ pulses in appropriate directions along bit lines, and DC currents of appropriate polarity into word lines. This approach allows design of very dense memories with n/spl les/2 Josephson junctions per bit, memory cell area smaller than 80 /spl lambda//sup 2/ (where /spl lambda/ is the minimum feature size), and the critical parameter margin well above /spl plusmn/20%. In this paper we present the general structure of the RSFQ RAM, as well as design and results of testing of the basic memory cell and decoder circuitry using Hypres' 3.5-/spl mu/m, 1-kA/cm/sup 2/ Nb-trilayer technology.<<ETX>>

[1]  V. Semenov,et al.  Single flux, quantum B flip-flop and its possible applications , 1994, IEEE Transactions on Applied Superconductivity.

[2]  Shuichi Nagasawa,et al.  A 4-kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW , 1991 .

[3]  D.Y. Zinoviev,et al.  New RSFQ circuits (Josephson junction digital devices) , 1993, IEEE Transactions on Applied Superconductivity.

[4]  A.F. Kirichenko,et al.  Implementation of novel "push-forward" RSFQ Carry-Save Serial Adders , 1995, IEEE Transactions on Applied Superconductivity.

[5]  O. Mukhanov,et al.  Ultimate performance of the RSFQ logic circuits , 1987 .

[6]  A. Rylyakov,et al.  RSFQ arithmetic blocks for DSP applications , 1995, IEEE Transactions on Applied Superconductivity.

[7]  W. Anacker,et al.  Josephson Computer Technology: An IBM Research Project , 1980, IBM J. Res. Dev..

[8]  S. Nagasawa,et al.  Miniaturized vortex transitional Josephson memory cell by a vertically integrated device structure , 1994, IEEE Transactions on Applied Superconductivity.

[9]  Stanislav Polonsky,et al.  PSCAN: personal superconductor circuit analyser , 1991 .

[10]  V. Semenov,et al.  RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.

[11]  O. Mukhanov,et al.  Implementation of a FFT radix 2 butterfly using serial RSFQ multiplier-adders , 1995, IEEE Transactions on Applied Superconductivity.

[12]  Siyuan Ran,et al.  Fabrication of high quality, deep-submicron Nb/AlO/sub x//Nb Josephson junctions using chemical mechanical polishing , 1995, IEEE Transactions on Applied Superconductivity.

[13]  V.K. Semenov,et al.  Design of an RSFQ microprocessor , 1995, IEEE Transactions on Applied Superconductivity.