STA : A System Testability Assistant

This paper presents a Computer Aided Testability tool named STA (System Testability Assistant), aiming at proposing a testability strategy for system as early as possible in the design process. Given a system description, STA first compiles it in order to create system, boards, and circuits objects, and then proceeds bottom-up, from the circuit to the system, in order evaluate the actual testability of the whole system, recommend a testability strategy and testability features inclusion in some modules, and provides support for including these testability features in the system by calling external generators or synthesis for testability tools.

[1]  M. Marzouki,et al.  High-level synthesis for testability , 1995, 38th Midwest Symposium on Circuits and Systems. Proceedings.

[2]  Meryem Marzouki,et al.  Test and diagnosis of analog circuits: When fuzziness can lead to accuracy , 1996, J. Electron. Test..

[3]  Meryem Marzouki,et al.  System fault diagnosis based on a fuzzy qualitative approach , 1996, Proceedings ED&TC European Design and Test Conference.

[4]  Dilip K. Bhavsar.  An Architecture for Extending the IEEE Standard 1149.1 Test Access Port to System Backplanes , 1991, 1991, Proceedings. International Test Conference.

[5]  Marcelo Lubaszewski,et al.  Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).