Performance enhancement of SISD processors

The automatic coordination of instruction execution of SISD processors is examined in the context of minimizing the effects of branch execution. Three areas, instruction prefetch, branch resolution, and issuer organization are examined for possible improvement. The thrust of these techniques is to extend conditional processing and to use look-ahead to detect branches. A structured instruction buffer, the converger, is used to buffer one or more levels of conditionally prefetched instructions. Conditioning schemes that permit a large degree of branch resolution overlap with instruction execution are presented. Issuer organization extensions, that promote a high issue rate and conditional instruction execution are presented.

[1]  Michael J. Flynn,et al.  Representation of Concurrency with Ordering Matrices , 1973, IEEE Transactions on Computers.

[2]  Richard G. Cooper.  The Distributed Pipeline , 1977, IEEE Transactions on Computers.

[3]  Daniel P. Siewiorek,et al.  The Use of LSI Modules in Computer Structures: Trends and Limitations , 1978, Computer.

[4]  David P Misunas.  A Computer Architecture for Data-Flow Computation. , 1978 .

[5]  R. M. Tomasulo,et al.  An efficient algorithm for exploiting multiple arithmetic units , 1995 .

[6]  Edward M. Riseman,et al.  The Inhibition of Potential Parallelism by Conditional Jumps , 1972, IEEE Transactions on Computers.

[7]  Michael J. Flynn,et al.  Detection and Parallel Execution of Independent Instructions , 1970, IEEE Transactions on Computers.

[8]  David W. Anderson,et al.  The IBM System/360 model 91: machine philosophy and instruction-handling , 1967 .

[9]  B. Ramakrishna Rau,et al.  The effect of instruction fetch strategies upon the performance of pipelined instruction units , 1977, ISCA '77.

[10]  James E. Rumbaugh,et al.  A Data Flow Multiprocessor , 1977, IEEE Transactions on Computers.

[11]  Hwa C. Torng,et al.  The Modeling and Design of Multiple Function-Unit Processors , 1976, IEEE Transactions on Computers.

[12]  A. L. Davis,et al.  The architecture and system method of DDM1: A recursively structured Data Driven Machine , 1978, ISCA '78.

[13]  Michael J. Flynn,et al.  Some Computer Organizations and Their Effectiveness , 1972, IEEE Transactions on Computers.

[14]  Robert M. Keller,et al.  Look-Ahead Processors , 1975, CSUR.

[15]  Andy Hisgen,et al.  A language implementation design for a multiprocessor computer system , 1978, ISCA '78.

[16]  C. V. Ramamoorthy,et al.  Pipeline Architecture , 1977, CSUR.

[17]  Edward M. Riseman,et al.  Percolation of Code to Enhance Parallel Dispatching and Execution , 1972, IEEE Transactions on Computers.