AMULET3: a high-performance self-timed ARM microprocessor

AMULET3 is a fully asynchronous implementation of ARM architecture v4T and was designed at the University of Manchester between 1996 and 1998. It is the third generation asynchronous ARM, and is aimed at a significantly higher performance level than its predecessors. Achieving this higher performance has required significant enhancements to the internal micro-architecture, such as the introduction of a reorder buffer to support efficient forwarding while retaining exact exception handling. In this paper we present an overview of the AMULET3 core, highlighting the issues which arise when striving for high performance and instruction set compatibility in an asynchronous design framework.

[1]  Kees van Berkel,et al.  Handshake Circuits: An Asynchronous Architecture for VLSI Programming , 1993 .

[2]  Marc Renaudin,et al.  ASPRO-216: a standard-cell Q.D.I. 16-bit RISC asynchronous microprocessor , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[3]  Paul I. Pénzes,et al.  The design of an asynchronous MIPS R3000 microprocessor , 1997, Proceedings Seventeenth Conference on Advanced Research in VLSI.

[4]  Jim D. Garside,et al.  AMULET2e: an asynchronous embedded controller , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[5]  Jianwei Liu,et al.  A low-power, low noise, configurable self-timed DSP , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[6]  Takashi Nanya,et al.  TITAC-2: an asynchronous 32-bit microprocessor based on scalable-delay-insensitive model , 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

[7]  Kenneth E. Iverson,et al.  The Design of APL , 1973, IBM J. Res. Dev..

[8]  Jim D. Garside,et al.  Register locking in an asynchronous microprocessor , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[9]  Nigel Charles Paver,et al.  The Design and Implementation of an Asynchronous Microprocessor , 1994 .

[10]  Jim D. Garside,et al.  The design and evaluation of an asynchronous microprocessor , 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[11]  Ad M. G. Peeters,et al.  An asynchronous low-power 80C51 microcontroller , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[12]  Ivan E. Sutherland,et al.  Micropipelines , 1989, Commun. ACM.

[13]  William John Bainbridge,et al.  Asynchronous macrocell interconnect using MARBLE , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[14]  Jim D. Garside,et al.  Asynchronous Embedded Control , 1998, Integr. Comput. Aided Eng..

[15]  Steve Furber,et al.  ARM System Architecture , 1996 .

[16]  David Vivian Jaggar.  A performance study of the Acorn RISC machine , 1990 .

[17]  Liam Goudge,et al.  Embedded control problems, Thumb, and the ARM7TDMI , 1995, IEEE Micro.