Fast analysis and optimization of power/ground networks

This paper presents an efficient method for optimizing power/ground (P/G) networks by widening wires and adding decoupling capacitors (decaps). It proposes a structured skeleton that is intermediate to the conventional method that uses full meshes (which are hard to analyze efficiently), and tree-structured networks (which provide poor performance). As an example, we consider a P/G network structure modeled as an overlying mesh with underlying trees originating from the mesh, which eases the task of analysis with acceptable performance sacrifices. A fast and efficient event-driven P/G network simulator is proposed, which hierarchically simulates the P/G network with an adaptation of PRIMA to handle non-zero initial conditions. An adjoint network that incorporates the variable topology of the original P/G network, as elements switch in and out of the network, is constructed to calculate the transient adjoint sensitivity over multiple intervals. The gradients of the most critical node with respect to each wire width and decap are used by a sensitivity-based heuristic optimizer that minimizes a weighted sum of the wire and the decap area. Experimental results show that this procedure can be used to efficiently optimize large networks.

[1]  Lawrence T. Pileggi,et al.  RICE: rapid interconnect circuit evaluator , 1991, 28th ACM/IEEE Design Automation Conference.

[2]  Rob A. Rutenbar,et al.  Addressing noise decoupling in mixed-signal IC's: power distribution design and cell customization , 1995 .

[3]  Rob A. Rutenbar,et al.  Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis , 1994, IEEE J. Solid State Circuits.

[4]  Ronald A. Rohrer,et al.  Sensitivity computation in piecewise approximate circuit simulation , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  G. G. Stokes "J." , 1890, The New Yale Book of Quotations.

[6]  S. Chowdhury,et al.  Estimation of maximum currents in MOS IC logic circuits , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Ronald A. Rohrer,et al.  Electronic Circuit and System Simulation Methods , 1994 .

[8]  W. Rudin Real and complex analysis, 3rd ed. , 1987 .

[9]  Ernest S. Kuh,et al.  Power and ground network topology optimization for cell based VLSIs , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[10]  Mark Horowitz,et al.  Techniques for calculating currents and voltages in VLSI power supply networks , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Sheldon X.-D. Tan,et al.  Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings , 1999, DAC '99.

[12]  W. Rudin Real and complex analysis , 1968 .

[13]  Raminderpal Singh Power Supply Noise Analysis Methodology for DeepSubmicron VLSI Chip Design , 2002 .

[14]  Sachin S. Sapatnekar,et al.  An algorithm for simulating power/ground networks using Pade approximants and its symbolic implementation , 1998 .

[15]  Lawrence T. Pileggi,et al.  PRIMA: passive reduced-order interconnect macromodeling algorithm , 1997, ICCAD 1997.