A sub-1V wide-load-range LDO regulator with sustained transient efficiency

This paper presents a current feedback buffer based output capacitorless low-dropout (OCL-LDO) regulator. By incorporating the weighted current feedback (WCF) circuit technique in a simplified buffer-based regulator architectural design, it can provide a fast response with efficient transient figure-of-merit (FOM) for wide current (IL) and capacitive (CL) load range. Validated in a UMC 65-nm CMOS process technology, the measurement results have confirmed that this regulator can deliver a maximum IL of 100 mA with overshoot/undershoot not more than 72 mV for a CL range from 470 pF to 10 nF under a 0.9V supply whilst consuming a quiescent current (IQ) of 14.4 µA. From the performance comparison results, the proposed circuit has achieved excellent transient FOM and displayed small overshoot/undershoot. More importantly, it offers sustainable transient parameters and transient FOM for wide CL and IL range.

[1]  Young-Il Kim,et al.  A Capacitorless LDO Regulator With Fast Feedback Technique and Low-Quiescent Current Error Amplifier , 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

[2]  Jianping Guo,et al.  A 6-$\mu$ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology , 2010, IEEE Journal of Solid-State Circuits.

[3]  Xiao Liang Tan,et al.  A LDO Regulator With Weighted Current Feedback Technique for 0.47 nF–10 nF Capacitive Load , 2014, IEEE Journal of Solid-State Circuits.

[4]  Qiang Li,et al.  An Ultrafast Adaptively Biased Capacitorless LDO With Dynamic Charging Control , 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

[5]  Chenchang Zhan,et al.  An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC , 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

[6]  T. Karnik,et al.  Area-efficient linear regulator with ultra-fast load regulation , 2005, IEEE Journal of Solid-State Circuits.

[7]  Gabriel A. Rincon-Mora.  Analog IC Design with Low-Dropout Regulators , 2014 .

[8]  José Silva-Martínez,et al.  External Capacitor-Less Low Drop-Out Regulator With 25 dB Superior Power Supply Rejection in the 0.4–4 MHz Range , 2014, IEEE Journal of Solid-State Circuits.

[9]  Jianping Guo,et al.  A 6- W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology , 2022 .

[10]  Pui Ying Or,et al.  An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection , 2010, IEEE Journal of Solid-State Circuits.