Configurable Transactional Memory

Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programming efficiency of such systems. In field-programmable computing machines, a conventional fixed transactional memory becomes inefficient use of the silicon. We propose configurable transactional memory (CTM) as a mechanism to implement application specific synchronization that utilizes the field-programmability of such devices to match with the requirements of an application. The proposed configurable transactional memory is targeted at embedded applications and is area efficient compared to conventional schemes that are implemented with cache-coherent protocols. In particular, the CTM is designed to be incorporated in to compilation and synthesis paths of either high-level languages or during system creation process using tools such as Xilinx EDK. We study the impact of deploying a CTM in a packet metering and statistics application and two micro-benchmarks as compared to a lock-based synchronization scheme. We have implemented this application in a Xilinx Virtex4 device and found that the CTM was 0-73% better than a fine-grained lock-based scheme.

[1]  Kunle Olukotun,et al.  Building and Using the ATLAS Transactional Memory System , 2006 .

[2]  Maurice Herlihy,et al.  Transactional Memory: Architectural Support For Lock-free Data Structures , 1993, Proceedings of the 20th Annual International Symposium on Computer Architecture.

[3]  Sean Lie Hardware Support for Unbounded Transactional Memory , 2004 .

[4]  Kunle Olukotun,et al.  Transactional coherence and consistency: simplifying parallel hardware and software , 2004, IEEE Micro.

[5]  Shlomo Weiss,et al.  Investigation of Transactional Memory Using FPGAs , 2006, 2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel.

[6]  Kunle Olukotun,et al.  Characterization of TCC on chip-multiprocessors , 2005, 14th International Conference on Parallel Architectures and Compilation Techniques (PACT'05).

[7]  Rasmus Pagh,et al.  Cuckoo Hashing , 2001, Encyclopedia of Algorithms.

[8]  R. Rajwar,et al.  Transactional Execution: Toward Reliable, High-Performance Multithreading , 2003, IEEE Micro.

[9]  James R. Goodman,et al.  Transactional lock-free execution of lock-based programs , 2002, ASPLOS X.

[10]  Ravi Rajwar,et al.  Speculative lock elision: enabling highly concurrent multithreaded execution , 2001, Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture. MICRO-34.