An enhanced double current limit technique used in high power BUCK converter
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Bo Zhang | Zhi Huang | Zekun Zhou | Zhaoji Li | Xing Ming
[1] Li Yan. New Protective Technology of Limiting-Current for Analogous Output Stages , 2002 .
[2] Z. J. Shen,et al. A new current limit circuit for smart discrete devices , 1998, Proceedings of the 10th International Symposium on Power Semiconductor Devices and ICs. ISPSD'98 (IEEE Cat. No.98CH36212).
[3] J. Radovsky,et al. A new linear regulator features switch mode overcurrent protection (for power supplies) , 1989, Proceedings, Fourth Annual IEEE Applied Power Electronics Conference and Exposition.
[4] P. Cooke. Analysis of a voltage controlled frequency foldback technique that improves short circuit protection for buck derived converters , 1996, Proceedings of Intelec'96 - International Telecommunications Energy Conference.
[5] Jian Yang. Analysis and evaluation of overcurrent protection for DC to DC PWM converters , 2004, The 4th International Power Electronics and Motion Control Conference, 2004. IPEMC 2004..
[6] Wang Yi,et al. The design of a start-up circuit for boost DC-DC converter with low supply voltage , 2005, 2005 6th International Conference on ASIC.
[7] P.K.T. Mok,et al. A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique , 2004, IEEE Journal of Solid-State Circuits.
[8] Qian Min. Study on the mechanism of Latch-up effect in CMOS IC and its countermeasures , 2003 .
[9] Peng Xu,et al. Investigation of candidate VRM topologies for future microprocessors , 2000 .