A Comparative Study of Si/Ge and GaSb/InAs Tunnel FET-Based Cellular Neural Network

This work presents a comparative analysis of Si/Ge and GaSb/InAs heterojunction Tunnel FET (TFET)-based cellular neural networks (CNNs). TFET-based CNNs are also compared against an equivalent FinFET-based CNN. A simulation methodology is shown to project realistic estimation of TFET-CNN performance based on the measured IDS-VGS characteristics of TFETs. III-V-TFET (i.e., GaSb/InAs TFET) shows a higher performance in CNN than Si/Ge-TFET due to a higher ON-current and much steeper switching slope (SS) in III-V-TFET. Meanwhile, Si/Ge-TFET shows a much lower OFF-current than III-V-TFET, and it is more suitable for ultralow power CNN applications. Cohesive simulation methodology discussed in the work also identifies that suppression of trap-assisted-tunneling (TAT)-induced leakage is critical to enable energy efficient TFET-based CNN. While a higher gate-to-drain capacitance (CGD, Miller capacitance) becomes a challenge in TFET-based digital designs, suitable design techniques are described to suppress its implications in throughput efficiency of TFET-CNN. Application of TFET-CNN is considered for image processing. Power-performance characteristics of CNN designs based on both the TFETs are compared.

[1]  Geert Hellings,et al.  Electrical TCAD Simulations of a Germanium pMOSFET Technology , 2010, IEEE Transactions on Electron Devices.

[2]  Josef A. Nossek,et al.  An analog implementation of discrete-time cellular neural networks , 1992, IEEE Trans. Neural Networks.

[3]  K. Kao,et al.  Direct and Indirect Band-to-Band Tunneling in Germanium-Based TFETs , 2012, IEEE Transactions on Electron Devices.

[4]  Indranil Palit,et al.  TFET-based cellular neural network architectures , 2013, International Symposium on Low Power Electronics and Design (ISLPED).

[5]  Lei Wang,et al.  Time multiplexed color image processing based on a CNN with cell-state outputs , 1998, IEEE Trans. Very Large Scale Integr. Syst..

[6]  Suman Datta,et al.  Application of Silicon-Germanium Source Tunnel-FET to Enable Ultralow Power Cellular Neural Network-Based Associative Memory , 2014, IEEE Transactions on Electron Devices.

[7]  Rita Rooyackers,et al.  Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs , 2013 .

[8]  Saibal Mukhopadhyay,et al.  Potential of Ultralow-Power Cellular Neural Image Processing With Si/Ge Tunnel FET , 2014, IEEE Transactions on Nanotechnology.

[9]  Sina Balkir,et al.  Computational paradigm for nanoelectronics: self-assembled quantum dot cellular neural networks , 2005 .

[10]  Leon O. Chua,et al.  Cellular neural networks: applications , 1988 .

[11]  S. Datta,et al.  Demonstration of p-type In0.7Ga0.3As/GaAs0.35Sb0.65 and n-type GaAs0.4Sb0.6/In0.65Ga0.35As complimentary Heterojunction Vertical Tunnel FETs for ultra-low power logic , 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

[12]  S. Datta,et al.  Effective Capacitance and Drive Current for Tunnel FET (TFET) CV/I Estimation , 2009, IEEE Transactions on Electron Devices.

[13]  Pinaki Mazumder,et al.  Tunneling-Based Cellular Nonlinear Network Architectures for Image Processing , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[14]  O. Madelung Semiconductors: Data Handbook , 2003 .