MMR: a high-performance MultiMedia Router-architecture and design trade-offs

This paper presents the architecture of a router designed to efficiently support traffic generated by multimedia applications. The router is targeted for use in clusters and LANs rather than in WANs, the latter being served by communication substrates such as ATM. The distinguishing features of the proposed router architecture are the use of small fixed-size buffers, a large number of virtual channels, link-level virtual channel flow control, support for dynamic modification of connection bandwidth and priorities, and coordinated scheduling of connections across all output channels. The paper begins with a discussion of the design choices and architectural trade-offs made in the current MultiMedia Router (MMR) project. The performance evaluation section presents some preliminary results of the coordinated scheduling of constant bit rate (CBR) traffic streams.

[1]  Thomas E. Anderson,et al.  High speed switch scheduling for local area networks , 1992, ASPLOS V.

[2]  Sudhakar Yalamanchili,et al.  Ariadne/spl minus/an adaptive router for fault-tolerant multicomputers , 1994, Proceedings of 21 International Symposium on Computer Architecture.

[3]  Antonio Robles,et al.  Efficient Adaptive Routing in Networks of Workstations with Irregular Topology , 1997, CANPC.

[4]  Dennis G. Shea,et al.  The SP2 High-Performance Switch , 1995, IBM Syst. J..

[5]  Michael Burrows,et al.  Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links , 1991, IEEE J. Sel. Areas Commun..

[6]  Martin de Prycker,et al.  Asynchronous Transfer Mode, Solution for Broadband Isdn , 1991 .

[7]  Charles L. Seitz,et al.  Myrinet: A Gigabit-per-Second Local Area Network , 1995, IEEE Micro.

[8]  Lawrence Snyder,et al.  A Comparison of Input and Output Driven Routers , 1996, Euro-Par, Vol. I.

[9]  Evangelos P. Markatos,et al.  ATLAS: A Single-Chip ATM Switch for NOWs , 1997, CANPC.

[10]  李幼升,et al.  Ph , 1989 .

[11]  Steven L. Scott,et al.  Optimized Routing in the Cray T3D , 1994, PCRCW.

[12]  Federico Silla,et al.  Improving the efficiency of adaptive routing in networks with irregular topology , 1997, Proceedings Fourth International Conference on High-Performance Computing.

[13]  José Duato,et al.  A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks , 1993, IEEE Trans. Parallel Distributed Syst..

[14]  Nick McKeown,et al.  A practical scheduling algorithm to achieve 100% throughput in input-queued switches , 1998, Proceedings. IEEE INFOCOM '98, the Conference on Computer Communications. Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies. Gateway to the 21st Century (Cat. No.98.

[15]  Robert W. Horst.  TNet: A Reliable System Area Network , 1995, IEEE Micro.

[16]  William J. Dally,et al.  The Reliable Router: A Reliable and High-Performance Communication Substrate for Parallel Computers , 1994, PCRCW.

[17]  Dinesh C. Verma,et al.  A Scheme for Real-Time Channel Establishment in Wide-Area Networks , 1990, IEEE J. Sel. Areas Commun..

[18]  Füsun Özgüner,et al.  A priority-based flow control mechanism to support real-time traffic in pipelined direct networks , 1996, Proceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing.

[19]  Jyh-Charn Liu,et al.  A hybrid interconnection network for integrated communication services , 1997, Proceedings 11th International Parallel Processing Symposium.

[20]  A. A. Chein,et al.  A cost and speed model for k-ary n-cube wormhole routers , 1998 .

[21]  Sudhakar Yalamanchili,et al.  Ariadne—an adaptive router for fault-tolerant multicomputers , 1994, ISCA '94.

[22]  Andrew A. Chien,et al.  Bandwidth and latency guarantees in low-cost, high-performance networks , 1997 .

[23]  Pedro López,et al.  A high performance router architecture for interconnection networks , 1996, Proceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing.

[24]  Andrew A. Chien,et al.  Approaches to Quality of Service in High-Performance Networks , 1997, PCRCW.

[25]  Sudhakar Yalamanchili,et al.  Configurable flow control mechanisms for fault-tolerant routing , 1995, ISCA.

[26]  Sudhakar Yalamanchili,et al.  A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks , 1995, IEEE Trans. Parallel Distributed Syst..

[27]  William J. Dally.  Virtual-channel flow control , 1990, ISCA '90.