Search-space Decomposition for System-level Design Space Exploration of Embedded Systems

The development of large-scale multi- and many-core platforms and the rising complexity of embedded applications have led to a significant increase in the number of implementation possibilities for a single application. Furthermore, rising demands on safe, energy-efficient, or real-time capable application execution make the problem of determining feasible implementations that are optimal with respect to such design objectives even more of a challenge. State-of-the-art Design Space Exploration (DSE) techniques for this problem demonstrably suffer from the vast and sparse search spaces posed by modern embedded systems, emphasizing the need for novel design methodologies in this field. Based on the idea of reducing problem complexity by a suitable decomposition of the system specification—in particular, by a reduction of target architecture or task mapping options—the work at hand proposes a portfolio of dynamic decomposition mechanisms that automatically decompose any system specification based on a short pre-exploration of the complete system. We present a two-phase approach consisting of (a) a set of novel data extraction and representation techniques combined with (b) a selection of filtering operations that automatically extract a decomposed system specification based on information gathered during pre-exploration. In particular, we employ heat map data structures and threshold as well as graph-partitioning filters to reduce problem complexity. The proposed decomposition procedure can seamlessly be integrated in any DSE flow, constituting a flexible extension for existing DSE approaches. Furthermore, it improves existing static decomposition techniques and other heuristics relying on information about the problem instance, since systems with irregular architectural topology or distribution of resource types can now be decomposed based on an automatic, problem-independent pre-exploration phase. We illustrate the efficiency of the proposed decomposition portfolio applied to state-of-the-art DSEs for many-core systems as well as networked embedded systems from the automotive domain. Experimental results show significant increases in optimization quality of up to 87% within constant DSE time compared to existing approaches.

[1]  Jürgen Teich,et al.  System-Level Synthesis Using Evolutionary Algorithms , 1998, Des. Autom. Embed. Syst..

[2]  Michael Glaß,et al.  DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systems , 2014, 2014 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[3]  Ewa Gajda,et al.  Hierarchic Genetic Strategy with maturing as a generic tool for Multiobjective Optimization , 2016, J. Comput. Sci..

[4]  Yixin Chen,et al.  Decomposition techniques for optimal design-space exploration of streaming applications , 2013, PPoPP '13.

[5]  Ed F. Deprettere,et al.  A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach , 2001, Embedded Processor Design Challenges.

[6]  Luca Benini,et al.  A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness , 2007, International Journal of Parallel Programming.

[7]  Sergio Siccha,et al.  Symmetry in Software Synthesis , 2017, ACM Trans. Archit. Code Optim..

[8]  Marco Laumanns,et al.  Performance assessment of multiobjective optimizers: an analysis and review , 2003, IEEE Trans. Evol. Comput..

[9]  Martin Lukasiewycz,et al.  Opt4J: a modular framework for meta-heuristic optimization , 2011, GECCO '11.

[10]  A. P. Shanthi,et al.  A SURVEY OF RESEARCH AND PRACTICES IN MULTIPROCESSOR SYSTEM ON CHIP DESIGN SPACE EXPLORATION , 2014 .

[11]  Marco Laumanns,et al.  Combining Convergence and Diversity in Evolutionary Multiobjective Optimization , 2002, Evolutionary Computation.

[12]  Kalyanmoy Deb,et al.  A fast and elitist multiobjective genetic algorithm: NSGA-II , 2002, IEEE Trans. Evol. Comput..

[13]  Michael Glaß,et al.  Towards scalable symbolic routing for multi-objective networked embedded system design and optimization , 2014, 2014 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[14]  George Theodoridis,et al.  A Logic-Based Benders Decomposition Approach for Mapping Applications on Heterogeneous Multicore Platforms , 2016, TECS.

[15]  Martin Lukasiewycz,et al.  Priority assignment for event-triggered systems using mathematical programming , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[16]  Jürgen Teich,et al.  *-Predictable MPSoC execution of real-time control applications using invasive computing: *Predictable MPSoC execution of real-time control applications using invasive computing , 2019 .

[17]  Martin Lukasiewycz,et al.  Solving Multi-objective Pseudo-Boolean Problems , 2007, SAT.

[18]  Jörg Henkel,et al.  ADAM: Run-time agent-based distributed application mapping for on-chip communication , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[19]  Soonhoi Ha,et al.  Multi-objective mapping optimization via problem decomposition for many-core systems , 2012, 2012 IEEE 10th Symposium on Embedded Systems for Real-time Multimedia.

[20]  Amit Kumar Singh,et al.  Mapping on multi/many-core systems: Survey of current and emerging trends , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[21]  Christian Menard,et al.  On the Representation of Mappings to Multicores , 2018, 2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC).

[22]  Christian Haubelt,et al.  SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications , 2009, TODE.

[23]  Jürgen Teich,et al.  Architecture Decomposition in System Synthesis of Heterogeneous Many-Core Systems , 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

[24]  Donatella Sciuto,et al.  Optimization strategies in design space exploration , 2017 .

[25]  Luca Benini,et al.  Optimal resource allocation and scheduling for the CELL BE platform , 2011, Ann. Oper. Res..

[26]  Brian W. Kernighan,et al.  An efficient heuristic procedure for partitioning graphs , 1970, Bell Syst. Tech. J..

[27]  Luca Foschini,et al.  Balanced Partitions of Trees and Applications , 2012, Algorithmica.

[28]  Michael Glaß,et al.  On Search-Space Restriction for Design Space Exploration of Multi-/Many-Core Systems , 2018, MBMV.

[29]  Behnaz Pourmohseni,et al.  Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems , 2019, ECRTS.

[30]  Michael Glaß,et al.  Supporting composition in symbolic system synthesis , 2016, 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS).

[31]  Amit Kumar Singh,et al.  Heuristic for Accelerating Run-Time Task Mapping in NoC-based Heterogeneous MPSoCs , 2014, J. Digit. Inf. Manag..

[32]  Muhammad Shafique,et al.  The EDA challenges in the dark silicon era , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[33]  Martin Lukasiewycz,et al.  Reliability-Aware System Synthesis , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[34]  Jürgen Teich,et al.  Symmetry-Eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[35]  Martin Lukasiewycz,et al.  Symbolic system synthesis in the presence of stringent real-time constraints , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

[36]  Jörg Henkel,et al.  Task scheduling for many-cores with S-NUCA caches , 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[37]  James W. Layland,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[38]  Lothar Thiele,et al.  Comparison of Multiobjective Evolutionary Algorithms: Empirical Results , 2000, Evolutionary Computation.