Execution Trace Graph of Dataflow Process Networks

The paper introduces and specifies a formalism that provides complete representations of dataflow process network (DPN) program executions, by means of directed acyclic graphs. Such graphs, also known as execution trace graphs (ETG), are composed of nodes representing each action firing and by directed arcs representing the dataflow program execution constraints between two action firings. Action firings are atomic operations that encompass the algorithmic part of the action executions applied to both, the input data and the actor state variables. The paper describes how an ETG can be effectively derived from a dataflow program, specifies the type of dependencies that need to be included, and the processing that need to be applied so that an ETG become capable of representing all the admissible trajectories that dynamic dataflow programs can execute. The paper also describes how some characteristics of the ETG, related to specific implementations of the dataflow program, can be evaluated by means of high-level and architecture-independent executions of the program. Furthermore, some examples are provided showing how the analysis of the ETGs can support efficient explorations, reductions, and optimizations of the design space, providing results in terms of design alternatives, without requiring any partial implementation or reduction of the expressiveness of the original DPN dataflow program.

[1]  Massimo Canale,et al.  Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques , 2016, J. Signal Process. Syst..

[2]  Malgorzata Michalska,et al.  Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs , 2015, ICCS.

[3]  Claudio Alberti,et al.  Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case study , 2013, 2013 Conference on Design and Architectures for Signal and Image Processing.

[4]  Jani Boutellier,et al.  Efficient scheduling policies for dynamic data flow programs executed on multi-core , 2016 .

[5]  Simone Casale-Brunet Analysis and optimization of dynamic dataflow programs , 2015 .

[6]  Johan Eker,et al.  CAL language report: Specification of the CAL actor language , 2003 .

[7]  M. Raussen,et al.  RELATIVE DIRECTED HOMOTOPY THEORY OF PARTIALLY ORDERED SPACES , 2006 .

[8]  Mickaël Raulet,et al.  MPEG Reconfigurable Video Coding , 2010, Handbook of Signal Processing Systems.

[9]  E.A. Lee,et al.  A comparison of synchronous and cycle-static dataflow , 1995, Conference Record of The Twenty-Ninth Asilomar Conference on Signals, Systems and Computers.

[10]  Sander Stuijk,et al.  Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications , 2011, 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

[11]  Edward A. Lee,et al.  Dataflow process networks , 2001 .

[12]  Mickaël Raulet,et al.  Reconfigurable media coding: An overview , 2013, Signal Process. Image Commun..

[13]  Ghislain Roquier,et al.  Design space exploration and implementation of RVC-CAL applications using the TURNUS framework , 2013, 2013 Conference on Design and Architectures for Signal and Image Processing.

[14]  Mickaël Raulet,et al.  Orcc: multimedia development made easy , 2013, MM '13.

[15]  Sander Stuijk,et al.  Automated bottleneck-driven design-space exploration of media processing systems , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[16]  Jorn W. Janneck,et al.  Synthesis and optimization of high-level stream programs , 2013, Proceedings of the 2013 Electronic System Level Synthesis Conference (ESLsyn).

[17]  Ed F. Deprettere,et al.  Dynamic Dataflow Graphs , 2018, Handbook of Signal Processing Systems.

[18]  Giovanni De Micheli,et al.  Readings in hardware / software co-design , 2001 .

[19]  Karine Heydemann,et al.  Interactive visualization of cross-layer performance anomalies in dynamic task-parallel applications and systems , 2016, 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).

[20]  Karine Heydemann,et al.  Automatic Detection of Performance Anomalies in Task-Parallel Programs , 2014, ArXiv.

[21]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[22]  Eric Goubault,et al.  Trace Spaces: An Efficient New Technique for State-Space Reduction , 2012, ESOP.

[23]  Marco Mattavelli,et al.  High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs , 2018, IEEE Transactions on Multi-Scale Computing Systems.

[24]  Jean A. Peperstraete,et al.  Cycle-static dataflow , 1996, IEEE Trans. Signal Process..

[25]  Marco Mattavelli MPEG Reconfigurable Video Representation , 2012 .

[26]  Malgorzata Maria Michalska,et al.  Systematic Design Space Exploration of Dynamic Dataflow Programs for Multi-core Platforms , 2017 .

[27]  Sander Stuijk,et al.  A scenario-aware data flow model for combined long-run average and worst-case performance analysis , 2006, Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings..

[28]  Rainer Leupers,et al.  Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[29]  Ghislain Roquier,et al.  Automatic software synthesis of dataflow program: An MPEG-4 simple profile decoder case study , 2008, 2008 IEEE Workshop on Signal Processing Systems.

[30]  Eric Goubault,et al.  Directed Algebraic Topology and Concurrency , 2016, Cambridge International Law Journal.

[31]  Edward A. Lee,et al.  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing , 1989, IEEE Transactions on Computers.

[32]  Wolfram Schulte,et al.  An Approach for Effective Design Space Exploration , 2010, Monterey Workshop.

[33]  Ivona Brandic,et al.  Performance Modeling and Prediction of Parallel and Distributed Computing Systems: A Survey of the State of the Art , 2007, First International Conference on Complex, Intelligent and Software Intensive Systems (CISIS'07).

[34]  Claudio Alberti,et al.  Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms , 2014, 2014 IEEE International Conference on Image Processing (ICIP).

[35]  Ghislain Roquier,et al.  Methods to explore design space for MPEG RMC codec specifications , 2013, Signal Process. Image Commun..

[36]  Henk Corporaal,et al.  System-scenario-based design of dynamic embedded systems , 2009, TODE.

[37]  Anca Muscholl,et al.  Trace Theory , 2011, Encyclopedia of Parallel Computing.

[38]  Jerónimo Castrillón Mazo Programming heterogeneous MPSoCs: tool flows to close the software productivity gap , 2013 .