Modeling and verification in model-based software engineering : application to embedded systems

Embedded Systems, including devices, middleware and software for the creation of intelligent sub-systems able of monitoring and controlling appliances, are more and more part of our world everyday lives; they are included in the basic infrastructure of society such as roads and railways and are key technologies used by millions of people every day. Moreover the continuous rapid evolution of modern embedded systems has given rise to new challenges: such as increasingly complex design processes that cause delays in time to market and cause escalation of overall design costs. Additionally, these systems are more prone to containing errors, and it becomes more relevant to provide designers with effective tools to aid them in overcoming the difficulties related to the overall system design, verification and validation. This thesis contributes to the definition and to the development of a model based methodology grounded on the OMG’s MARTE profile (Modeling and Analysis of Real Type and Embedded Systems) and on SysML profile to model requirements targeting an avionic case study, with a particular attention to the reuse of the modelled components and to the benefits of their verification. This thesis aims at discussing and illustrating the effectiveness of using a combination of UML, MARTE and SysML languages at the different steps of the embedded system modelling efforts and to provide within this thesis a set of methodological guidelines/steps and an approach to create design model, stores and verify them