Modeling statistical dopant fluctuations in MOS transistors

The impact of statistical dopant fluctuations on the threshold voltage V/sub T/ and device performance of silicon MOSFET's is investigated by means of analytical and numerical modeling. A new analytical model describing dopant fluctuations in the active device area enables the derivation of the standard deviation, /spl sigma/V/sub T/, of the threshold voltage distribution for arbitrary channel doping profiles. Using the MINIMOS device simulator to extend the analytical approach, it is found that /spl sigma/V/sub T/, can be properly derived from two-dimensional (2-D) or three-dimensional (3-D) simulations using a relatively coarse simulation grid. Evaluating the threshold voltage shift arising from dopant fluctuations, on the other hand, calls for full 3-D simulations with a numerical grid that is sufficiently refined to represent the discrete nature of the dopant distribution. The average V/sub T/-shift is found to be positive for long, narrow devices, and negative for short, wide devices. The fast 2-D MINIMOS modeling of dopant fluctuations enables an extensive statistical analysis of the intrinsic spreading in a large set of compact model parameters for state-of-the-art CMOS technology. It is predicted that V/sub T/-variations due to dopant fluctuations become unacceptably large in CMOS generations of 0.18 /spl mu/m and beyond when the present scaling scenarios are pursued. Parameter variations can be drastically reduced by using alternative device designs with ground-plane channel profiles.

[1]  S. M. Sze,et al.  Physics of semiconductor devices , 1969 .

[2]  C. Mead,et al.  Fundamental limitations in microelectronics—I. MOS technology , 1972 .

[3]  R. Keyes The effect of randomness in the distribution of impurity atoms on FET thresholds , 1975 .

[4]  Shojiro Asai,et al.  Threshold Voltage Deviation in Very Small MOS Transistors Due to Local Impurity Fluctuations , 1982, 1982 Symposium on VLSI Technology. Digest of Technical Papers.

[5]  Ken Yamaguchi,et al.  A New Short Channel MOSFET with an Atomic-Layer-Doped Impurity-Profile (ALD-MOSFET) , 1983 .

[6]  K. R. Lakshmikumar,et al.  Characterisation and modeling of mismatch in MOS transistors for precision analog design , 1986 .

[7]  Massimo Vanzi,et al.  A physically based mobility model for numerical simulation of nonplanar devices , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  K. Nakagawa,et al.  Atomic layer doped field‐effect transistor fabricated using Si molecular beam epitaxy , 1989 .

[9]  S. Selberherr MOS device modeling at 77 K , 1989 .

[10]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[11]  Siegfried Selberherr,et al.  The evolution of the minimos mobility model , 1990 .

[12]  Naoyuki Shigyo,et al.  Effects of microscopic fluctuations in dopant distributions on MOSFET threshold voltage , 1992 .

[13]  R.M.D.A. Velghe,et al.  Compact MOS modeling for analog circuit simulation , 1993, Proceedings of IEEE International Electron Devices Meeting.

[14]  Stefan Kubicek,et al.  A Powerful TCAD System Including Advanced RSM Techniques for Various Engineering Optimization Problems , 1993 .

[15]  H. Wong,et al.  Three-dimensional "atomistic" simulation of discrete random dopant distribution effects in sub-0.1 /spl mu/m MOSFET's , 1993, Proceedings of IEEE International Electron Devices Meeting.

[16]  A. Toriumi,et al.  Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFET's , 1994 .

[17]  Toru Tatsumi,et al.  0.1 /spl mu/m delta-doped MOSFET using post low-energy implanting selective epitaxy , 1994, Proceedings of 1994 VLSI Technology Symposium.

[18]  D. Burnett,et al.  Implications of fundamental threshold voltage variations for high-density SRAM and logic circuits , 1994, Proceedings of 1994 VLSI Technology Symposium.

[19]  P. Gubian,et al.  Applying a submicron mismatch model to practical IC design , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[20]  M.J. van Dort,et al.  Circuit sensitivity analysis in terms of process parameters , 1995, Proceedings of International Electron Devices Meeting.

[21]  D. Schmitt-Landsiedel,et al.  Intra-die device parameter variations and their impact on digital CMOS gates at low supply voltages , 1995, Proceedings of International Electron Devices Meeting.

[22]  Xinghai Tang,et al.  Random MOSFET parameter fluctuation limits to gigascale integration (GSI) , 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

[23]  T. Mizuno Influence of Statistical Spatial-Nonuniformity of Dopant Atoms on Threshold Voltage in a System of Many MOSFETs , 1996 .

[24]  P. Stolk,et al.  The effect of statistical dopant fluctuations on MOS device performance , 1996, International Electron Devices Meeting. Technical Digest.

[25]  K. Takeuchi,et al.  Channel engineering for the reduction of random-dopant-placement-induced threshold voltage fluctuation , 1997, International Electron Devices Meeting. IEDM Technical Digest.

[26]  M. Vertregt,et al.  CMOS technology for mixed signal ICs , 1997 .

[27]  J. Poate,et al.  B diffusion and clustering in ion implanted Si: The role of B cluster precursors , 1997 .

[28]  A.H. Montree,et al.  Effects of gate depletion and boron penetration on matching of deep submicron CMOS transistors , 1997, International Electron Devices Meeting. IEDM Technical Digest.