VLSI architectures for weighted order statistic (WOS) filters

Abstract The class of median filters has been extended to include weighted order statistics (WOS) filters, to improve the flexibility of the filtering operation. The WOS filter weights each input within a sample window, and thus retains the original temporal order information. In this paper, we present efficient VLSI architectures for WOS filters which maintain a weighted rank for each sample in the sample window and update the weighted ranks for each window shift. We present novel (i) array architectures, (ii) stack filter architectures and (iii) sorting network architectures for non-recursive and recursive WOS filters which implement the above procedure. Our analysis shows that the bit-serial stack filter implementation is the one with the smallest area while the bit-parallel stack filter is the one with the smallest input–output latency. The sorting network architecture (based on updating a sorted list) has the best area–time performance. Physical implementations verify our analysis.

[1]  Keshab K. Parhi,et al.  Synthesis of control circuits in folded pipelined DSP architectures , 1992 .

[2]  Edward J. Coyle,et al.  Stack filters , 1986, IEEE Trans. Acoust. Speech Signal Process..

[3]  Jaakko Astola,et al.  Analysis of the properties of median and weighted median filters using threshold logic and stack filter representation , 1991, IEEE Trans. Signal Process..

[4]  Chaitali Chakrabarti Sorting network based architectures for median filters , 1993 .

[5]  C. Chakrabarti High sample rate array architectures for median filters , 1994, IEEE Trans. Signal Process..

[6]  Chaitali Chakrabarti Efficient stack filter implementations of rank order filters , 1993, 1993 IEEE International Symposium on Circuits and Systems.

[7]  Kenneth E. Batcher,et al.  Sorting networks and their applications , 1968, AFIPS Spring Joint Computing Conference.

[8]  K. Chen Bit-serial realizations of a class of nonlinear filters based on positive Boolean functions , 1989 .

[9]  Lori E. Lucke,et al.  Training recursive structures for weighted order statistic filtering , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[10]  Keshab K. Parhi,et al.  VLSI Structures for Weighted Order Statistics Filters , 1993, IEEE Winter Workshop on Nonlinear Digital Signal Processing.

[11]  Jaakko Astola,et al.  Implementation of cascaded and recursive stack filters , 1996 .

[12]  Kemal Oflazer Design and implementation of a single-chip 1-D median filter , 1983 .

[13]  Chaitali Chakrabarti,et al.  VLSI architectures for weighted order statistic (WOS) filters , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[14]  Keshab K. Parhi,et al.  A new VSLI architecture for rank order and stack filters , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[15]  Edward J. Coyle,et al.  Stack filters and the mean absolute error criterion , 1988, IEEE Trans. Acoust. Speech Signal Process..

[16]  J. Fitch Software and VLSI algorithms for generalized ranked order filtering , 1987 .

[17]  Chaitali Chakrabarti,et al.  Highly concurrent architectures for recursive median filters , 1993, Proceedings of IEEE Workshop on VLSI Signal Processing.

[18]  Jaakko Astola,et al.  Optimal weighted order statistic filters under the mean absolute error criterion , 1991, [Proceedings] ICASSP 91: 1991 International Conference on Acoustics, Speech, and Signal Processing.

[19]  J. Fitch,et al.  Median filtering by threshold decomposition , 1984 .

[20]  Moncef Gabbouj,et al.  Optimal stack filtering and the estimation and structural approaches to image processing , 1989, Sixth Multidimensional Signal Processing Workshop,.

[21]  Dana S. Richards,et al.  VLSI median filters , 1990, IEEE Trans. Acoust. Speech Signal Process..

[22]  Levent Onural,et al.  Design and implementation of a general-purpose median filter unit in CMOS VLSI , 1990 .

[23]  Sos S. Agaian,et al.  Parallel algorithms and VLSI architectures for stack filtering using Fibonacci p-codes , 1995, IEEE Trans. Signal Process..