Communication synthesis and interface synthesis for embedded systems

Embedded systems are ubiquitous in everyday life, so commonplace that they are easily overlooked. People carry cellular phones, pagers, and Personal Digital Assistants; they drive in cars with anti-lock brakes, active suspension, and drive-by-wire; they live in houses with home entertainment, security, and climate control systems and work in offices with fax machines and laser printers. It is nearly impossible to go through an entire day without encountering an embedded system. With their increasing capabilities and decreasing cost, new embedded systems have encountered unprecedented demand. The designers of embedded systems are under tremendous pressure to quickly create new products. Unfortunately, today's system design tools provide little relief to system architects. A comprehensive approach (i.e., a methodology and toolset) is necessary for embedded systems that use real-time distributed heterogeneous target architectures. To further reduce design time, such an approach must directly support reusable components. Our research attempts to solve the various synthesis challenges required to implement a comprehensive methodology that shields designers from low-level, target-specific details. The algorithms developed automate mapping-specific details and synthesize additional software and hardware to realize the mapping. Our communication synthesis approach lets designers focus on the high-level functionality of their system and quickly quantify architectural tradeoffs. The tool has been fully integrated with a co-simulator that lets designers better explore the design space of possible implementations. Designers can select processors, peripheral devices, and bus protocols and connect them in any topology to create a target architecture. They can then map a behavioral description to their target architecture. Our communication and interface synthesis toolset provides the remaining details that enable behavioral processes to communicate in the target architecture. We validate our methodology and toolset by applying them to a network vehicle. This complex embedded system contains twelve processors, multiple busses, multihop communication, and real-time constraints. With our approach, it takes only minutes to begin evaluating a new candidate target architecture, as opposed to days or weeks with today's design environments.