An ultra low power variable length decoder for MPEG-2 exploiting codeword distribution

A data driven variable length decoder chip is presented which exploits the signal statistics of variable length codes to reduce power. The approach uses fine grain lookup table partitioning to reduce switched capacitance based on codeword frequency. The variable length decoder for MPEG-2 has been fabricated and consumes 530 /spl mu/W at 1.35 V for a video rate of 48M DCT samples/sec using a 0.6 /spl mu/m CMOS technology. More than an order magnitude of power reduction is demonstrated without performance loss compared to a conventional parallel decoding scheme with a single lookup table.

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