Time complexity modeling and comparison of parallel architectures for Fourier transform oriented algorithms

A technique for modeling the time-domain complexity of the implementation of an algorithm is described. The model includes algorithm-, architecture-, and technology-related parameters. The model is used here to compare architectures for various Fourier-transform-oriented algorithms; however, use of the model can point to possible changes in algorithm or architecture that will increase performance. The development of the model is discussed, and an analysis of five different Fourier-transform algorithms is given.<<ETX>>

[1]  Ellis Horowitz,et al.  Fundamentals of Data Structures , 1984 .

[2]  Alfred V. Aho,et al.  The Design and Analysis of Computer Algorithms , 1974 .

[3]  J. Martens.  Recursive cyclotomic factorization--A new algorithm for calculating the discrete Fourier transform , 1984 .

[4]  S. Asai,et al.  Design and fabrication of depletion GaAs LSI high-speed 32-bit adder , 1983, IEEE Journal of Solid-State Circuits.

[5]  Veljko M. Milutinovic,et al.  An Introduction to GaAs Microprocessor Architecture for VLSI , 1986, Computer.

[6]  Howard Jay Siegel,et al.  Performance Measures for Evaluating Algorithms for SIMD Machines , 1982, IEEE Transactions on Software Engineering.

[7]  Pierre Duhamel,et al.  Implementation of "Split-radix" FFT algorithms for complex, real, and real-symmetric data , 1986, IEEE Trans. Acoust. Speech Signal Process..

[8]  Martin Vetterli,et al.  MOVAL: A framework for turning digital signal processing algorithms into custom hips , 1986 .

[9]  B. K. Gilbert,et al.  The application of gallium arsenide integrated circuit technology to the design and fabrication of future generation digital signal processors: promises and problems , 1988, Proc. IEEE.

[10]  Leah J. Siegel,et al.  Highly parallel architectures and algorithms for speech analysis , 1984, ICASSP.

[11]  M. Vetterli,et al.  Simple FFT and DCT algorithms with reduced number of operations , 1984 .

[12]  Thompson.  Fourier Transforms in VLSI , 1983, IEEE Transactions on Computers.

[13]  R. Taylor.  Signal processing with occam and the transputer , 1984 .

[14]  Alan Norton,et al.  Parallelization and Performance Analysis of the Cooley–Tukey FFT Algorithm for Shared-Memory Architectures , 1987, IEEE Transactions on Computers.

[15]  P. Duhamel,et al.  `Split radix' FFT algorithm , 1984 .

[16]  P. Asbeck,et al.  A high-speed LSI GaAs 8x8 bit parallel multiplier , 1982, IEEE Journal of Solid-State Circuits.

[17]  Veljko M. Milutinovic,et al.  A multimicroprocessor architecture for real-time computation of a class of DFT algorithms , 1986, IEEE Trans. Acoust. Speech Signal Process..

[18]  Martin Vetterli,et al.  A Discrete Fourier-Cosine Transform Chip , 1986, IEEE J. Sel. Areas Commun..

[19]  Ranga Vemuri,et al.  Data flow graph partitioning to reduce communication cost , 1986, MICRO 19.

[20]  Kathleen M. Nichols,et al.  Modeling multicomputer systems with PARET , 1988, Computer.

[21]  Mark A. Richards.  On hardware implementation of the split-radix FFT , 1988, IEEE Trans. Acoust. Speech Signal Process..

[22]  R. Jarocki,et al.  Modular architecture for high performance implementation of FFT algorithm , 1986, ISCA 1986.

[23]  C. Sidney Burrus,et al.  On the number of multiplications necessary to compute a length-2nDFT , 1986, IEEE Trans. Acoust. Speech Signal Process..