Part II: experimental analysis of the very sparse matrix converter

For the sake of simplicity no LC input filter was considered but the input voltage has been assumed to be directly applied to the converter input. There, the time behavior of the mains phase currents iN,i, i.e. of the input filter inductor currents of a practical system was obtained by averaging the discontinuous rectifier input currents over one pulse half period. The simulation results are compiled in Fig.19, where (d) shows the purely sinusoidal behavior of input and output quantities. The local average a i of the rectifier stage input phase current ia is lying in phase with the corresponding mains phase voltage ua , accordingly the system shows ohmic fundamental mains behavior (cf. Eq.(4)) As Fig.19(a) clearly shows, each power transistor is clamped within a π/3-wide interval of an input and/or output fundamental period what is indicated by a voltage across the power transistors of bpb S u = 0 and/or Bn S u = 0. In Fig.19(f) the time behavior of the DC link current i is given where i>0, and/or i=i+, i− is valid (cf. Eq.(50)), according to the output power factor of cos Φ2=0.961 (cf. Fig.19(d), load phase displacement of Φ2 < π/6). VIII. PRACTICAL REALIZATION