Residual Syntax Elements Analysis and Design Targeting High-Throughput HEVC CABAC
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Marcelo Porto | Sergio Bampi | Bruno Zatt | Fábio Luís Livi Ramos | Fabio Luis Livi Ramos | Alessandro Via Piana Saggiorato | B. Zatt | M. Porto | S. Bampi
[1] Gary J. Sullivan,et al. High Efficiency Video Coding (HEVC), Algorithms and Architectures , 2014, Integrated Circuits and Systems.
[2] Sergio Bampi,et al. High-Throughput Binary Arithmetic Encoder using Multiple-Bypass Bins Processing for HEVC CABAC , 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).
[3] Heiko Schwarz,et al. Context-based adaptive binary arithmetic coding in the H.264/AVC video compression standard , 2003, IEEE Trans. Circuits Syst. Video Technol..
[4] Vivienne Sze,et al. A Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-Tier Applications , 2014, IEEE Transactions on Circuits and Systems for Video Technology.
[5] Satoshi Goto,et al. A high-performance CABAC encoder architecture for HEVC and H.264/AVC , 2013, 2013 IEEE International Conference on Image Processing.
[6] Sergio Bampi,et al. Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture , 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).
[7] Sergio Bampi,et al. HEVC Residual Syntax Elements Generation Architecture for High-Throughput CABAC Design , 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).
[8] F. Bossen,et al. Common test conditions and software reference configurations , 2010 .
[9] Xin Fan,et al. Asynchronous and GALS Design -Overview and Perspectives , 2017, 2017 New Generation of CAS (NGCAS).
[10] Satoshi Goto,et al. A 1 Gbin/s CABAC encoder for H.264/AVC , 2011, 2011 19th European Signal Processing Conference.
[11] Krzysztof Wegner,et al. Bitrate distribution of syntax elements in the HEVC encoded video , 2014, 2014 International Conference on Signals and Electronic Systems (ICSES).
[12] Massoud Pedram,et al. Clock-gating and its application to low power design of sequential circuits , 2000 .
[13] Anthony Correale,et al. Overview of the power minimization techniques employed in the IBM PowerPC 4xx embedded controllers , 1995, ISLPED '95.
[14] Sergio Bampi,et al. Low-power multi-size HEVC DCT architecture proposal for QFHD video processing , 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).
[15] Satoshi Goto,et al. Ultra-High-Throughput VLSI Architecture of H.265/HEVC CABAC Encoder for UHDTV Applications , 2015, IEEE Transactions on Circuits and Systems for Video Technology.
[16] Tim Brecht,et al. Characterizing the workload of a netflix streaming video server , 2016, 2016 IEEE International Symposium on Workload Characterization (IISWC).