This paper presents a readout integrated circuit of pixel architecture called MPIX (Multithreshold PIXels), designed for CdTe pixel detectors used in high-energy X-ray imaging applications. The MPIX IC of the area of $9.6\ \text{mm} \times 20.3\ \text{mm}$ is designed in a CMOS 130 nm process. The IC core is a matrix of $96\times 192$ square-shaped pixels of $100\ \mu \mathrm{m}$ pitch. Each pixel contains an analog front-end, four independently working discriminators, and four 12-bit ripple counters. Such pixel architecture allows photon processing one by one and selecting the X-ray photons according to their energy (X-ray color imaging). The MPIX chips are bump-bonded to pixel CdTe sensor with a pitch of $100\ \mu \mathrm{m}$ and thickness of $750\ \mu \mathrm{m}$. These hybrid detectors (sensor bump-bonded to readout integrated circuit) are characterized by test pulses and X-ray radiation. To match the different range of applications the MPIX chip has 8 possible different gain settings. In the high gain mode, the chip can operate with Xray photons up to 46 keV and has the Equivalent Noise Charge (ENC) of 123 el. rms. In the low gain mode, the ENC is equal to 192 el. rms, and the chip can process the X-ray photons of energy up to 154 keV. The matrix of 18432 pixels has a very good uniformity: globally set threshold has an effective pixel to pixel offset spread of 1 mV (for the full threshold range up to 800 mV). The power consumption per pixel is $80\ \mu \mathrm{W}/\text{pixel}$. Additionally, to deal with charge sharing effects in a thick semiconductor pixel sensor, Multithreshold Pattern Recognition algorithms are implemented in the MPIX IC.