Performance analysis of closed loop power control methods in the UTRA-FDD mode

In this paper, closed loop power control procedures in UTRA-FDD are studied. Fast power control is perhaps the most important aspect in a WCDMA system like this. The research has been carried out through a physical layer simulator that has been implemented in the C language from the standard of the UTRA-FDD mode. Different parameters have been taken into account: The research has been made in parallel for two mobile speeds, 3 km/h and 50 km/h, getting very different results. Different step sizes have been tested. The implementation of an adaptive algorithm to predict the received power to try to improve the power control has been studied, but large improvements have not been obtained. The probability distribution of the power control error and the influence of the distance between the base station and the mobile have also been studied.